MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 340

• Manufacturer Part Number: MMC2114CFCAG33
• Description: IC MCU 32BIT 33MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2114CFCAG33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: MMC2114
• Core: M-CORE
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 104
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Controller Family/series: MCORE
• No. Of I/o's: 104
• Ram Memory Size: 32KB
• Cpu Speed: 33MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Timer Modules (TIM1 and TIM2)
Advance Information
340
NOTE:
The timer prescaler generates the divide-by-64 clock. If the timer is not
active, there is no divide-by-64 clock.
To operate in gated time accumulation mode:
CLK[1:0] — Clock Select Bits
PAOVI — Pulse Accumulator Overflow Interrupt Enable Bit
PAI — Pulse Accumulator Input Interrupt Enable Bit
In gated time accumulation mode (PAMOD = 1):
1. Apply logic 0 to RESET pin.
2. Initialize registers for pulse accumulator mode test.
3. Apply appropriate level to PAI pin.
4. Enable timer.
CLK[1:0] select the timer counter input clock as shown in
PAOVI enables the PAOVF flag to generate interrupt requests.
PAI enables the PAIF flag to generate interrupt requests.
Freescale Semiconductor, Inc.
1. Changing the CLKx bits causes an immediate change in the timer counter clock input.
2. When PAE = 0, the timer prescaler clock is always the timer counter clock.
For More Information On This Product,
1 = Low PAI input enables divide-by-64 clock to pulse accumulator
0 = High PAI input enables divide-by-64 clock to pulse accumulator
1 = PAOVF interrupt requests enabled
0 = PAOVF interrupt requests disabled
1 = PAIF interrupt requests enabled
0 = PAIF interrupt requests disabled
CLK[1:0]
00
01
10
11
and trailing rising edge on PAI sets PAIF flag.
and trailing falling edge on PAI sets PAIF flag.
Timer Modules (TIM1 and TIM2)
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Table 16-6. Clock Selection
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
Timer Counter Clock
Timer prescaler clock
PACLK/65536
PACLK/256
PACLK
(2)
(1)
Table
MOTOROLA
16-6.