MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 494

• Manufacturer Part Number: MMC2114CFCAG33
• Description: IC MCU 32BIT 33MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2114CFCAG33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: MMC2114
• Core: M-CORE
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 104
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Controller Family/series: MCORE
• No. Of I/o's: 104
• Ram Memory Size: 32KB
• Cpu Speed: 33MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Queued Analog-to-Digital Converter (QADC)
19.10.4 Disabled Mode
19.10.5 Reserved Mode
19.10.6 Single-Scan Modes
Advance Information
494
NOTE:
When disabled mode is selected, the queue is not active. Trigger events
cannot initiate queue execution. When both queue 1 and queue 2 are
disabled, there is no possibility of encountering wait states when
accessing CCW table and result RAM. When both queues are disabled,
it is safe to change the QCLK prescaler values.
Reserved mode is available for future mode definitions. When reserved
mode is selected, the queue is not active. The behavior is the same as
disabled mode.
A single-scan queue operating mode is used to execute a single pass
through a sequence of conversions defined by a queue. By
programming the MQ1 field in QACR1 or the MQ2 field in QACR2, these
modes can be selected:
Queue 2 cannot be programmed for externally gated single-scan mode.
In all single-scan queue operating modes, queue execution is enabled
by writing the single-scan enable bit to a 1 in the queue’s control register.
The single-scan enable bits, SSE1 and SSE2, are provided for queue 1
and queue 2, respectively.
Until a queue’s single-scan enable bit is set, any trigger events for that
queue are ignored. The single-scan enable bit may be set to a 1 during
the same write cycle that selects the single-scan queue operating mode.
The single-scan enable bit can be written only to 1, but will always
read 0. Once set, writing the single-scan enable bit to 0 has no effect.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Queued Analog-to-Digital Converter (QADC)
Software-initiated single-scan mode
Externally triggered single-scan mode
Externally gated single-scan mode
Interval timer single-scan mode
Go to: www.freescale.com
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA