MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 387
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MMC2114CFCAG33
Manufacturer Part Number
MMC2114CFCAG33
Description
IC MCU 32BIT 33MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Specifications of MMC2114CFCAG33
Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2114
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
104
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
MCORE
No. Of I/o's
104
Ram Memory Size
32KB
Cpu Speed
33MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MMC2114CFCAG33
Manufacturer:
Freescale Semiconductor
Quantity:
135
Company:
Part Number:
MMC2114CFCAG33
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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17.12.4 Framing Errors
17.12.5 Baud Rate Tolerance
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
RT CLOCK COUNT
RESET RT CLOCK
RT CLOCK
SAMPLES
RXD
1
1
1
Serial Communications Interface Modules (SCI1 and SCI2)
In
RT9, and RT10 high. This sets the noise flag but does not reset the RT
clock. In start bits only, the RT8, RT9, and RT10 data samples are
ignored.
If the data recovery logic does not detect a 1 where the stop bit should
be in an incoming frame, it sets the FE flag in SCISR1. A break frame
also sets the FE flag because a break frame has no stop bit. The FE flag
is set at the same time that the RDRF flag is set.
A transmitting device may be operating at a baud rate below or above
the receiver baud rate. Accumulated bit time misalignment can cause
one of the RT8, RT9, and RT10 stop bit data samples to fall outside the
stop bit. A noise error occurs if the samples are not all the same value.
If more than one of the samples is outside the stop bit, a framing error
occurs. In most applications, the baud rate tolerance is much more than
the degree of misalignment that is likely to occur.
As the receiver samples an incoming frame, it resynchronizes the RT
clock on any valid falling edge within the frame. Resynchronization
within frames corrects misalignments between transmitter bit times and
receiver bit times.
1
Figure 17-22. Start Bit Search Example 6
Figure 17-22
Freescale Semiconductor, Inc.
1
For More Information On This Product,
1
1
Go to: www.freescale.com
1
1
a noise burst makes the majority of data samples RT8,
0
Serial Communications Interface Modules (SCI1 and SCI2)
0
0
START BIT
0
1
0
1
Advance Information
LSB
Receiver
387
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