TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 72

• Manufacturer Part Number: TMPM330FWFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
• Manufacturer: Toshiba

Specifications of TMPM330FWFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 128K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 3V
• Cpu Mhz: 40
• Ssp (ch) Spi: -
• I2c/sio (ch): 3
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: -
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: 12
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 10
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / Rohs Status: Details

8 Exceptions
8.2
8.3
Reset Control Register.
interrupt.
Reset exceptions are generated from the following three sources.
Use the Reset Flag (RSTFLG) Register of the Clock Generator to identify the source of a reset.
・External reset pin
A reset exception occurs when an external reset pin changes from “L” to “H”.
・Reset exception by WDT
The watchdog timer (WDT) has a reset generating feature. For details, see the chapter on the WDT.
・Reset exception by SYSRESETREQ
A reset can be generated by setting the SYSRESETREQ bit in the NVIC’s Application Interrupt and
Non-maskable interrupts are generated from the following two sources.
Use the NMI Flag (NMIFLG) Register of the clock generator to identify the source of a non-maskable
・External NMI pin
・Non-maskable interrupt by WDT
Reset Exceptions
Non-Maskable Interrupts (NMIs)
the chapter on the WDT.
A non-maskable interrupt is generated when an external NMI pin changes from “H” to “L”.
The watchdog timer (WDT) has a non-maskable interrupt generating feature. For details, see
Under development
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TMPM330