TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 158

• Manufacturer Part Number: TMPM330FWFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
• Manufacturer: Toshiba

Specifications of TMPM330FWFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 128K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 3V
• Cpu Mhz: 40
• Ssp (ch) Spi: -
• I2c/sio (ch): 3
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: -
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: 12
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 10
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / Rohs Status: Details

10 16-bit Timer/Event Counters (TMRBs)
Channel
10.2 Differences in the Specifications
(1)
(2)
TMRB0
TMRB1
TMRB2
TMRB3
TMRB4
TMRB5
TMRB6
TMRB7
TMRB8
TMRB9
The flip-flop output of TMRB 7 through TMRB 9 can be used as the capture trigger of other channels.
The start trigger of the timer synchronous mode (with TBxRUN)
Each channel (TMRB0 through TMRB9) functions independently and the channels operate in the
same way, except for the differences in their specifications as shown in Table 10-1 and Table 10-2
and the two-phase pulse count function. Therefore, the operational descriptions here are only for
TMRB0.
Specification
The channels shown below are used as the capture or start trigger.
・
・
・
・
・
Table 10-1 Differences in the Specifications of TMRB Modules (1)
TB7OUT => available for TMRB 0 through TMRB 1
TB8OUT => available for TMRB 2 through TMRB 4
TB9OUT => available for TMRB 5 through TMRB 6
TMRB0 => can start TMRB 0 through TMRB 3 synchronously
TMRB4 => can start TMRB 4 through TMRB 7 synchronously
capture trigger input
TB0IN0 (shared with PH0)
TB0IN1 (shared with PH1)
TB1IN0 (shared with PH2)
TB1IN1 (shared with PH3)
TB2IN0 (shared with PH4)
TB2IN1 (shared with PH5)
TB3IN0 (shared with PH6)
TB3IN1 (shared with PH7)
TB5IN0 (shared with PD0)
TB5IN1 (shared with PD1)
TB6IN0 (shared with PD2)
TB6IN1 (shared with PD3)
TB4IN0 (shared with PI6)
TB4IN1 (shared with PI7)
External clock/
pins
－
－
－
External pins
Under development
Timer flip-flop output pin Timer for capture triggers
TB8OUT (shared with PG7)
TB9OUT (shared with PK2)
TB6OUT (shared with PJ4)
TB7OUT (shared with PJ5)
TB0OUT (shared with PI0)
TB1OUT (shared with PI1)
TB2OUT (shared with PI2)
TB4OUT (shared with PI4)
TB5OUT (shared with PI5)
TB3OUT (shared with PI3)
Page146
TB7OUT
TB7OUT
TB8OUT
TB8OUT
TB8OUT
TB9OUT
TB9OUT
－
－
－
Trigger
synchronous stat
TB0PRUN,TB0RUN
TB0PRUN,TB0RUN
TB0PRUN,TB0RUN
TB4PRUN,TB4RUN
TB4PRUN,TB4RUN
TB4PRUN,TB4RUN
Timer for
triggers
－
－
－
－
TMPM330