TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 302

• Manufacturer Part Number: TMPM330FWFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
• Manufacturer: Toshiba

Specifications of TMPM330FWFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 128K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 3V
• Cpu Mhz: 40
• Ssp (ch) Spi: -
• I2c/sio (ch): 3
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: -
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: 12
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 10
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / Rohs Status: Details

13 Consumer Electronics Control (CEC)
13.3 Operations
13.3.1
13.3.1.1 Sampling Clock
13.3.1.2 Basic Operation
per byte. The interrupt is generated after a byte of data (8 bit), the EOM bit and the ACK bit are
received. The data, EOM and ACK bit are stored in a buffer.
bit. The received data is discarded.
CEC lines are sampled by a low speed clock.
If reception is enabled, detecting a start bit generates a start bit interrupt and starts receiving data
Detecting an error during data reception causes an error interrupt, and CEC waits for the next start
Reception
interrupt
Start bit
S
H
D1
D2
Under development
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D3
D4
Receiving interrupt
Dn-2
Dn-1
TMPM330
Dn