TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 49

• Manufacturer Part Number: TMPM330FWFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
• Manufacturer: Toshiba

Specifications of TMPM330FWFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 128K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 3V
• Cpu Mhz: 40
• Ssp (ch) Spi: -
• I2c/sio (ch): 3
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: -
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: 12
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 10
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / Rohs Status: Details

<Bit 0><SYSCKFLG>
<Bit 1><SYSCK>
CKSEL
7.2.2.5
Read/Write
Read/Write
Read/Write
Read/Write
Bit symbol
After reset
Bit symbol
After reset
Bit symbol
After reset
Bit symbol
After reset
Function
Function
Function
Function
System Clock Selection Register
15
23
31
7
0
0
0
0
-
-
-
-
Switching the oscillator with <SYSCK> generates time lag to complete. If the
output of the oscillator specified in <SYSCK> is read out by <SYSCLKFLG>, the
switching has been completed.
: Shows the status of the system clock.
: Enables to specify the system clock. Setting OSCCR1<XEN> and <XTEN> to “1”
in advance is required.
14
22
30
6
0
0
0
0
-
-
-
-
Under development
13
21
29
5
0
0
0
0
-
-
-
-
“0” is read.
Page37
R
12
20
28
4
0
0
0
0
-
-
-
-
“0” is read.
“0” is read.
“0” is read.
R
R
R
11
19
27
3
0
0
0
0
-
-
-
-
10
18
26
2
0
0
0
0
-
-
-
-
System
clock
0:
High-speed
(fc)
1:
Low-speed
(fs)
SYSCK
R/W
17
25
1
9
0
0
0
0
-
-
-
TMPM330
System
clock
status
0:
High-spee
d (fc)
1:
Low-speed
(fs)
Stable
oscillation
identical
with
<SYSCK>
value.
SYSCK
FLG
16
24
R
0
0
8
0
0
0
-
-
-