TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 298

• Manufacturer Part Number: TMPM330FWFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
• Manufacturer: Toshiba

Specifications of TMPM330FWFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 128K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 3V
• Cpu Mhz: 40
• Ssp (ch) Spi: -
• I2c/sio (ch): 3
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: -
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: 12
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 10
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / Rohs Status: Details

13 Consumer Electronics Control (CEC)
13.2.12 Transmit Control Register [CECTCR]
bit Symbol
Read/Write
After reset
bit Symbol
Read/Write
After reset
bit Symbol
Read/Write
After reset
Function
Function
Function
“0” is
read.
“0” is
read.
“0” is read.
23
15
―
―
R
R
7
0
0
CECDTRS
CECSTRS
Rising timing of start bit
000: Reference value (RV)
001: RV –1cycle
010: RV –2cycle
011: RV –3cycle
100: RV –4cycle
101: RV –5cycle
110: RV –6cycle
111: RV –7cycle
Rising timing of data bit
000: RV
001: RV –1cycle
010: RV –2cycle
011: RV –3cycle
100: RV –4cycle
101: RV –5cycle
110: RV –6cycle
111: RV –7cycle
22
14
―
6
R
2
2
0
Under development
CECSTRS
CECDTRS
Page286
R/W
R/W
21
13
5
1
0
1
0
CECSTRS
CECDTRS
Broadcast
transmissi
on
0: No
1: Yes
CECBRD
R/W
20
12
4
0
0
0
CECDPRD
CECFREE
“0” is
read.
Data bit cycle
0000: RV
0001: RV –1cycle
0010: RV –2cycle
0011: RV –3cycle
0100: RV –4cycle
0101: RV –5cycle
0110: RV –6cycle
0111: RV –7cycle
Time of bus to be free
0000: 1 bit cycle
0001: 2 bit cycle
0010: 3 bit cycle
0011: 4 bit cycle
0100: 5 bit cycle
0101: 6 bit cycle
0110: 7 bit cycle
0111: 8 bit cycle
19
11
―
R
3
0
3
3
CECSPRD
CECDPRD
CECFREE
Start bit cycle
000: RV
001: RV –1cycle
010: RV –2cycle
011: RV –3cycle
100: RV –4cycle
101: RV –5cycle
110: RV –6cycle
111: RV –7cycle
18
10
2
2
2
2
R/W
R/W
0
0
CECDPRD
CECSPRD
CECFREE
1000: RV –8cycle
1001: RV –9cycle
1010: RV –10cycle
1011: RV –11cycle
1100: RV –12cycle
1101: RV –13cycle
1110: RV –14cycle
1111: RV –15cycle
1000: 9 bit cycle
1001: 10 bit cycle
1010: 11 bit cycle
1011: 12 bit cycle
1100: 13 bit cycle
1101: 14 bit cycle
1110: 15 bit cycle
1111: 16 bit cycle
R/W
17
9
1
1
0
1
1
TMPM330
CECDPRD
CECSPRD
CECFREE
16
8
0
0
0
0