TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 111

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TMPM330FWFG

Manufacturer Part Number
TMPM330FWFG
Description
Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
Manufacturer
Toshiba
Datasheets

Specifications of TMPM330FWFG

Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
128K
Rom Type
Flash
Ram (kbytes)
8K
Number Of Pins
100
Package
LQFP(14×14)
Vcc
3V
Cpu Mhz
40
Ssp (ch) Spi
-
I2c/sio (ch)
3
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
-
Cs/wait Controller (ch)
-
Dma Controller
-
10-bit Da Converter
-
10-bit Ad Converter
12
12-bit Ad Converter
-
16-bit Timer / Counter
10
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPM330FWFG
Manufacturer:
Toshiba
Quantity:
10 000
IMCGD
8.6.3.4
(Note 1)
(Note 2)
CG Interrupt Mode Control Register D
bit Symbol
Read/Write
After reset
Function
bit Symbol
Read/Write
After reset
Function
bit Symbol
Read/Write
After reset
Function
bit Symbol
Read/Write
After reset
Function
Refer to EMSTxx bit to know the active condition which is used for clearing
standby.
Please specify the bit for the edge first and then specify the bit for the
<INTxEN>. Setting them simultaneously is prohibited.
“0” is read. Active state setting of INTCECTX
“0” is read.
“0” is read.
“0” is read.
15
23
31
7
R
R
R
R
0
0
0
0
Set it as shown below.
standby clear request.
EMCGC2
010: Rising edge
14
22
30
6
0
0
0
0
Under development
Write any value.
Write any value.
Write any value.
EMCGC1
R/W
R/W
R/W
R/W
13
21
29
Page99
5
1
1
1
1
EMCGC0
12
20
28
4
0
0
0
0
Active state of
INTCECTX standby
clear request.
00: -
01: Rising edge
10: Falling edge
11: Both edges
EMSTC1
11
19
27
3
0
0
0
0
R
“0” is read.
“0” is read.
“0” is read.
EMSTC0
10
18
26
2
R
R
R
0
0
0
0
“0” is read. INTCECTX
17
25
1
R
9
0
0
0
0
1: Enable
Clear input
0: Disable
INTCEN
Write “0”.
Write “0”.
Write “0”.
TMPM330
R/W
R/W
R/W
R/W
16
24
0
8
0
0
0
0

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