TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 272

• Manufacturer Part Number: TMPM330FWFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
• Manufacturer: Toshiba

Specifications of TMPM330FWFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 128K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 3V
• Cpu Mhz: 40
• Ssp (ch) Spi: -
• I2c/sio (ch): 3
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: -
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: 12
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 10
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / Rohs Status: Details

12 Serial Bus Interface (SBI)
(Note)
12.6.5
SCL (bus)
SCL pin
SDA pin
<LRB>
<BB>
<PIN>
Restart Procedure
Do not write <MST> to “0” when it is “0.” (Restart cannot be initiated.)
Restart is used when a master device changes the data transfer direction without
terminating the transfer to a slave device. The procedure of generating a restart in the
master mode is described below.
First, set SBIxCR2 <MST, TRX, BB> to “0” and write “1” to <PIN> to release the bus. At this
time, the SDA pin is held at the “H” level and the SCL pin is released. Because no stop
condition is generated on the bus, other devices recognize that the bus is busy. Then, test
SBIxSR <BB> and wait until it becomes “0” to ensure that the SCL pin is released. Next,
test <LRB> and wait until it becomes “1” to ensure that no other device is pulling the SCL
bus line to the “L” level.
above-mentioned steps 12.6.2 to generate the start condition.
To satisfy the setup time of restart, at least 4.7-μs wait period (in the standard mode) must
be created by the software after the bus is determined to be free.
(Note) X: Don’t care
SBIxCR2 ← 0 0 0 1 1 0 0 0
if SBIxSR<BB> ≠ 0
Then
if SBIxSR<LRB> ≠ 1
Then
4.7 μ s Wait
SBIxCR1 ← X X X 1 0 X X X
SBIxDBR ← X X X X X X X X
SBIxCR2 ← 1 1 1 1 1 0 0 0
Fig. 12-19 Timing Chart of Generating a Restart
“0” → <MST>
“0” → <TRX>
“0” → <BB>
“1” → <PIN>
7 6 5 4 3 2 1 0
9
Under development
Once the bus is determined to be free this way, use the
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Releases the bus.
Checks that the SCL pin is released.
Checks that no other device is pulling the SCL pin to the
“L” level.
Selects the acknowledgment mode.
Sets the desired slave address and direction.
Generates the start condition.
“1” → <MST>
“1” → <TRX>
“1” → <BB>
“1” → <PIN>
4.7 μ s (min.)
Start condition
TMPM330