TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 269

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TMPM330FWFG

Manufacturer Part Number
TMPM330FWFG
Description
Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
Manufacturer
Toshiba
Datasheets

Specifications of TMPM330FWFG

Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
128K
Rom Type
Flash
Ram (kbytes)
8K
Number Of Pins
100
Package
LQFP(14×14)
Vcc
3V
Cpu Mhz
40
Ssp (ch) Spi
-
I2c/sio (ch)
3
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
-
Cs/wait Controller (ch)
-
Dma Controller
-
10-bit Da Converter
-
10-bit Ad Converter
12
12-bit Ad Converter
-
16-bit Timer / Counter
10
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPM330FWFG
Manufacturer:
Toshiba
Quantity:
10 000
INTSBIx interrupt
Slave mode (<MST> = “0”)
In the slave mode, the SBI generates the INTSBIx interrupt request on four occasions: 1)
when the SBI has received any slave address from the master, 2) when the SBI has
received a general-call address, 3) when the received slave address matches its own
address, and 4) when a data transfer has been completed in response to a general-call.
Also, if the SBI detects Arbitration Lost in the master mode, it switches to the slave mode.
Upon the completion of data word transfer in which Arbitration Lost is detected, the INTSBIx
interrupt request is generated, <PIN> is cleared to “0,” and the SCL pin is pulled to the “L”
level. When data is written to or read from SBIxDBR or when <PIN> is set to “1,” the SCL
pin is released after a period of t
In the slave mode, the normal slave mode processing or the processing as a result of
Arbitration Lost is carried out.
required.
Table 12-2 shows the slave mode states and required processing.
Example: When the received slave address matches the SBI's own address and the
direction bit is “1” in the slave receiver mode.
if TRX = 0
Then go to other processing
if AL = 1
Then go to other processing
if AAS = 0
Then go to other processing
(Note) X: Don’t care
SBIxCR1 ← X X X 1 0 X X X
SBIxDBR ← X X X X 0 X X X
SBIxSR <AL>, <TRX>, <AAS> and <AD0> are tested to determine the processing
Under development
Page257
LOW
.
Sets the number of bits to be transmitted.
Sets the transmit data.
TMPM330

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