TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 410
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TMPM330FWFG
Manufacturer Part Number
TMPM330FWFG
Description
Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
Manufacturer
Toshiba
Specifications of TMPM330FWFG
Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
128K
Rom Type
Flash
Ram (kbytes)
8K
Number Of Pins
100
Package
LQFP(14×14)
Vcc
3V
Cpu Mhz
40
Ssp (ch) Spi
-
I2c/sio (ch)
3
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
-
Cs/wait Controller (ch)
-
Dma Controller
-
10-bit Da Converter
-
10-bit Ad Converter
12
12-bit Ad Converter
-
16-bit Timer / Counter
10
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
Lead Free Status / Rohs Status
Details
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Part Number
Manufacturer
Quantity
Price
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18 Flash Memory Operation
Boot ROM
(Note 1) FD/ FY/ FW in the above table denotes the TMPM330FDFG, TMPM330FYFG and
(Note 2) In I/O Interface mode, the baud rate for the transfers of the first and second bytes must
(Note 3) In case of any negative acknowledge, the boot program returns to a state in which it
(Note 4) The 19th to 25th bytes must be within the RAM address range from 0x2000_0400 through
RAM
be 1/16 of the desired baud rate.
waits for a command code (3rd byte). In I/O Interface mode, if a communication error
occurs, a negative acknowledge does not occur.
the end address of RAM.
TMPM330FWFG respectively.
1 byte
2 byte
3 byte
4 byte
5 byte -
16 byte
17 byte
18 byte
19 byte
20 byte
21 byte
22 byte
23 byte
24 byte
25 byte
26 byte
27 byte
∼
m byte
m + byte
m + byte
m + byte
Byte
Table 18-6 Transfer Format for the RAM Transfer Command
Data Transferred from the Controller
Serial operation mode and baud rate
For UART mode
For I/O Interface mode 30H
Command code
Password sequence (12 bytes)
0x3F87_FF04~0x3F87_FF0F (FD/ FY)
0x3F81_FF04~0x3F81_FF0F (FW)
Check SUM value for bytes 5 - 16
RAM storage start address 31 - 24
RAM storage start address 23 - 16
RAM storage start address 15 - 8
RAM storage start address 7 - 0
RAM storage byte count 15 - 8
RAM storage byte count 7 - 0
Check SUM value for bytes 19 - 24
RAM storage data
Checksum value for bytes 27 - m
to the TMPM330
-
-
-
-
-
-
86H
Under development
Page398
(10H)
Desired baud
rate (Note 2)
Baud rate
Data Transferred from the TMPM330
ACK for the serial operation mode byte
For UART mode
-Normal acknowledge
(The boot program aborts if the baud rate
For I/O Interface mode
-Normal acknowledge
ACK for the command code byte (Note 3)
-Normal acknowledge
-Negative acknowledge
-Communication error
ACK for the checksum byte (Note 3)
-Normal acknowledge
-Negative acknowledge
-Communication error
ACK for the checksum byte (Note 3)
-Normal acknowledge
-Negative acknowledge
-Communication error
ACK for the checksum byte (Note 3)
-Normal acknowledge
-Negative acknowledge
-Communication error
Jump to RAM storage start address
can not be set correctly.)
to the Controller
-
-
-
-
-
-
-
-
-
-
-
-
-
TMPM330
× 1H
× 8H
86H
30H
10H
10H
10H
10H
x1H
x8H
x1H
x8H
x1H
x8H
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