TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 35
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TMPM330FWFG
Manufacturer Part Number
TMPM330FWFG
Description
Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
Manufacturer
Toshiba
Specifications of TMPM330FWFG
Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
128K
Rom Type
Flash
Ram (kbytes)
8K
Number Of Pins
100
Package
LQFP(14×14)
Vcc
3V
Cpu Mhz
40
Ssp (ch) Spi
-
I2c/sio (ch)
3
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
-
Cs/wait Controller (ch)
-
Dma Controller
-
10-bit Da Converter
-
10-bit Ad Converter
12
12-bit Ad Converter
-
16-bit Timer / Counter
10
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
Lead Free Status / Rohs Status
Details
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4
4.1
4.2
4.3
4.4
Debug Interface
In-Circuit Emulator (ICE) and the Embedded Trace Macrocell
output. Trace data is output to the dedicated pins (TRACEDATA[0]-[3], SWV) via the on-chip Trace
Port Interface Unit (TPIU).
Port (TDI, TDO, TMS, TCK, TRST).
trace output from SWV.
debug port function. The PB0 pin is shared between the JTAG debug port function and the SWV
trace output function.
functions of other debug interface pins need to be programmed as required.
SWJ-DP supports the two-pin Serial Wire Debug Port (SWDCK, SWDIO) and the JTAG Debug
ETM supports four data signal pins (TRACEDATA[0]-[3]), one clock signal pin (TRACECLK) and
The debug interface pins can also be used as general-purpose ports.
The PA0 and PA1 pins are shared between the JTAG debug port function and the serial wire
After reset, the PA0, PA1, PB0, PB1 and PB2 pins are configured as debug port function pins. The
When using a low power consumption mode, take note of the following points.
The TMPM330 contains the Serial Wire JTAG Debug Port (SWJ-DP) unit for interfacing with the
(Note 1)
(Note 2)
For details about SWJ-DP, ETM and TPIU, refer to “Cortex-M3 Technical Reference Manual” .
Specification Overview
Features of SWJ-DP
Features of ETM
Pin Functions
If PA0 and PB0 are configured as TMS/SWDIO and TDO/SWV, output continues to be
If PA1 is configured as a debug function pin, it prevents a low power consumption
enabled even in STOP mode regardless of the setting of the STBYCR2<DRVE> bit .
mode from being fully effective. Configure PA1 to function as a general-purpose
port if the debug function is not used.
Under development
Page23
TM
(ETM) unit for instruction trace
TMPM330
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