TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 61

• Manufacturer Part Number: TMPM330FWFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
• Manufacturer: Toshiba

Specifications of TMPM330FWFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 128K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 3V
• Cpu Mhz: 40
• Ssp (ch) Spi: -
• I2c/sio (ch): 3
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: -
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: 12
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 10
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / Rohs Status: Details

7.6.6
in the IDLE mode. The NMI pin can be used to release all the lower power consumption modes.
● Release by interrupt request
● Release by NMI
There are two kinds of NMI sources: WDT interrupt (INTWDT) and NMI pin. INTWDT can only be used
● Release by reset
release source that can be used is determined by the low power consumption mode selected.
Details are shown in Table 7-9.
detect the interrupt. In addition to the setting in the CPU, the clock generator must be set to detect
the interrupt to be used to release the SLEEP and STOP modes.
mode switches to NORMAL and all the registers are initialized as is the case with normal reset.
reset signal valid until the oscillator operation becomes stable.
Release
(Note 1)
(Note 2)
source
The low power consumption mode can be released by an interrupt request, NMI or reset. The
To release the low power consumption mode by an interrupt, the CPU must be set in advance to
Any low power consumption modes can be released by reset from the RESET pin. After that, the
Note that returning to NORMAL mode by reset does not induce the automatic warm-up. Keep the
Refer to “Interrupts" for details.
Releasing the Low Power Consumption Mode
○:
×:
Low power consumption mode
NMI (INTWDT)
NMI (INT pin)
RESET (RESET pin)
Interrupt
Starts the interrupt handling after the mode is released. (The reset
initializes the LSI).
Unavailable
For shifting to the low power consumption mode, set the CPU to prohibit all the
interrupts other than the release source. If not, releasing may be executed by an
unspecified interrupt.
To release the low power consumption mode by using the level mode interrupt,
keep the level until the interrupt handling is started. Changing the level before
then will prevent the interrupt handling from starting properly.
INT0~7 (Note 1)
INTRTC
INTTB0~9
INTCAP00~60, 01~61
INTRX0~2, INTTX0~2
INTSBI0~2
INTCECRX, INTCECTX
INTRMCRX0,1
INTAD/INTADHP/ INTADM
Table 7-9 Release Source in Each Mode
Under development
Page49
IDLE
○
○
○
○
○
○
○
○
○
○
○
○
SLEEP
○
○
×
×
×
×
○
○
×
×
○
○
STOP
○
×
×
×
×
×
×
×
×
×
○
○
TMPM330