TMPM330FWFG Toshiba, TMPM330FWFG Datasheet - Page 306
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TMPM330FWFG
Manufacturer Part Number
TMPM330FWFG
Description
Microcontrollers (MCU) MCU w/ ARM Cortex-M3 128K FLASH, 8K SRAM
Manufacturer
Toshiba
Specifications of TMPM330FWFG
Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
128K
Rom Type
Flash
Ram (kbytes)
8K
Number Of Pins
100
Package
LQFP(14×14)
Vcc
3V
Cpu Mhz
40
Ssp (ch) Spi
-
I2c/sio (ch)
3
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
-
Cs/wait Controller (ch)
-
Dma Controller
-
10-bit Da Converter
-
10-bit Ad Converter
12
12-bit Ad Converter
-
16-bit Timer / Counter
10
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
Lead Free Status / Rohs Status
Details
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13 Consumer Electronics Control (CEC)
(10) Waveform Error Detection
CECRCR3 register.
specify the detection time in the <CECWAV0> <CECWAV1> <CECWAV2> <CECWAV3> bits.
described in (3), a waveform error interrupt is generated.
To detect an error when a received waveform is out of the defined tolerance range, configure the
An error is detected when the <CECWAVEN> bit of the CECRCR3 register is enabled. You can
If the rising edge is detected during the period (1) or (2) shown below, or not detected in the timing
(1) A period between the beginning of a bit and the fastest logical “1” rising timing.
(2) A period between the latest logical “1” rising timing and the fastest logical “0” rising timing.
(3) The latest logical “0” rising timing.
detection
period
Error
0ms
<CECWAV0>
0.4ms-7cycle
~0.4ms
(1)
0.4ms
Under development
0.8ms
<CECWAV1>
0.8ms~
0.8ms+7cycle
Page294
(2)
<CECWAV2>
1.3ms-7cycle
~1.3ms
1.3ms
1.7ms
<CECWAV3>
1.7ms~
1.7ms+7cycle
(3)
TMPM330
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