M30845FJGP#U3 Renesas Electronics America, M30845FJGP#U3 Datasheet - Page 348

IC M32C MCU FLASH 512K 144LQFP

M30845FJGP#U3

Manufacturer Part Number
M30845FJGP#U3
Description
IC M32C MCU FLASH 512K 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets

Specifications of M30845FJGP#U3

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
M
R
R
e
E
3
. v
J
2
0
C
1
9
8 /
0 .
B
0
1
4
23.1.1.1 RESET1 and RESET0 Bits
23.1.1.2 LOOPBACK Bit
23.1.1.3 BASICCAN Bit
0
G
When both RESET1 and RESET0 bits are set to "1" (CAN module reset), the CAN module is imme-
diately reset regardless of ongoing CAN communication.
After the RESET1 and RESET0 bits are set to "1" and the CAN module reset is completed, the
C0TSR register is set to "0000
STATE_ERRPAS and STATE_BUSOFF bits in the C0STR register are set to "0" as well.
When both RESET1 and RESET0 bit settings are changed "1" to "0", the C0TSR register starts
counting. CAN communication is available after 11 continuous recessive bits are detected.
When the LOOPBACK bit is set to "1" (loopback function enabled) and the receive message slot has
a matched ID and frame format with a transmitted frame, the transmitted frame is stored to the
receive message slot.
When the BASICCAN bit is set to "1", the message slots 14 and 15 enter BasicCAN mode.
In BasicCAN mode, the message slots 14 and 15 are used as dual-structured buffers. The message
slots 14 and 15 alternately store a received frame having matched ID detected by acceptance filtering.
ID in the message slot 14 and the C0LMAR0 to C0LMAR4 registers are used for acceptance filtering
when the message slot 14 is active (the next received frame is to be stored in the message slot 14).
ID in the message slot 15 and the C0LMBR0 to C0LMBR4 registers are used when the message slot
15 is active. Both data frame and remote frame can be received.
Use the following procedure to enter BasicCAN mode.
(1) Set the BASICCAN bit to "1".
(2) Set the same value into IDs in the message slots 14 and 15.
(3) Set the same value in the C0LMAR0 to C0LMAR4 registers and C0LMBR0 to C0LMBR4 regis-
(4) Set the IDE14 and IDE15 bits in the C0IDR register to select a frame format (standard or ex-
(5) Set the C0MCTL14 and C0MCTL15 registers in the message slots 14 and 15 to receive data
3
J
NOTES:
NOTES:
6
u
o r
0 -
. l
1. Set the same value in both RESET1 and RESET0 bits simultaneously.
2. Confirm that the STATE_RESET bit in the C0STR register is set to "1" (CAN module reset
3. The CAN
4. For CAN communication, set the PS1, PS2, PSL1, PSL2, PSC, PSC2, IPS, PD7 and PD8
1. No ACK for the transmitted frame is returned.
2. Change the LOOPBACK bit setting only when the STATE_RESET bit is set to "1" (CAN module
u
ters.
tended) for the message slots 14 and 15. (Set to the same format.)
frame.
0
1
p
completed) after setting the RESET1 and RESET0 bits to "1".
set to "1". CAN bus error may occur when the RESET1 and RESET0 bits are set to "1" while the
CAN frame is transmitting.
registers when the STATE_RESET bit is set to "1" (CAN module reset completed).
reset completed).
, 7
0
1
(
2
M
0
3
0
2
5
C
8 /
OUT
Page 325
, 4
M
pin puts out a high-level ("H") signal as soon as the RESET1 and RESET0 bits are
3
2
C
8 /
f o
4
4
) T
9
5
16
". The C0TEC and C0REC registers are set to "00
23. CAN Module
16
" and the