M30845FJGP#U3 Renesas Electronics America, M30845FJGP#U3 Datasheet - Page 284
Manufacturer Part Number
IC M32C MCU FLASH 512K 144LQFP
Renesas Electronics America
Specifications of M30845FJGP#U3
CAN, I²C, IEBus, SIO, UART/USART
DMA, PWM, WDT
Number Of I /o
Program Memory Size
512KB (512K x 8)
Program Memory Type
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
A/D 34x10b, D/A 2x8b
-40°C ~ 85°C
Package / Case
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 18.9 Trigger Select Function Settings
18.2.1 Resolution Select Function
18.2.2 Sample and Hold Function
18.2.3 Trigger Select Function
18.2.4 DMAC Operating Mode
TRG = 0
TRG = 1
1. A/D0 starts the A/D conversion when the ADST bit is set to "1" (A/D conversion started) and a trigger is generated.
2. The A/D conversion is restarted if an external trigger or a hardware trigger is inserted during the A/D conversion.
The BITS bit in the AD0CON1 register determines the resolution. When the BITS bit is set to "1" (10-bit
precision), the A/D conversion result is stored into bits 9 to 0 in the AD0j register (j = 0 to 7). When the
BITS bit is set to "0" (8-bit precision), the A/D conversion result is stored into bits 7 to 0 in the AD0j
When the SMP bit in the AD0CON2 register is set to "1" (with the sample and hold function), A/D conver-
sion rate per pin increases to 28 Ø
The sample and hold function is available in all operating modes. Start the A/D conversion after selecting
whether the sample and hold function is to be used or not.
The TRG bit in the AD0CON0 register and the TRG0 bit in the AD0CON2 register select the trigger to
start the A/D conversion. Table 18.9 lists settings of the trigger select function.
DMAC operating mode is available with all operating modes. When the A/D converter is in multi-port
single sweep mode or multi-port repeat sweep mode 0, the DMAC operating mode must be used. When
the DUS bit in the AD0CON3 register is set to "1" (DMAC operating mode enabled), all A/D conversion
results are stored into the AD00 register. DMAC transfers data from the AD00 register to any memory
space every time an A/D conversion is completed in each pin. 8-bit DMA transfer must be selected for 8-
bit resolution and 16-bit DMA transfer for 10-bit resolution. Refer to 13. DMAC for instructions.
(The A/D conversion in process is aborted.)
Bit and Setting
TRG0 = 0
TRG0 = 1
cycles for 8-bit resolution and 33 Ø
The A/D0 starts the A/D conversion when the ADST bit in the
AD0CON0 register is set to "1"
Falling edge of a signal applied to AD
The timer B2 interrupt request of three-phase motor control timer
functions (after the ICTB2 counter completes counting)
cycles for 10-bit resolution.
18. A/D Converter