M30845FJGP#U3 Renesas Electronics America, M30845FJGP#U3 Datasheet - Page 119

IC M32C MCU FLASH 512K 144LQFP

M30845FJGP#U3

Manufacturer Part Number
M30845FJGP#U3
Description
IC M32C MCU FLASH 512K 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets

Specifications of M30845FJGP#U3

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
M
R
R
9.4 Clock Output Function
e
E
3
. v
J
2
Table 9.6 CLK
Table 9.5 CLK
- : Can be set to either "0" or "1"
NOTES:
- : Can be set to either "0" or "1"
NOTES:
0
C
9.3.3 f
9.3.4 f
The CLK
In memory expansion mode or microprocessor mode, a clock having the same frequency as the CPU clock
can be output from the BCLK pin as BCLK.
Table 9.5 lists CLK
expansion mode and microprocessor mode.
PM15 Bit
1
9
PM1 Register
PM0 Register
0 .
8 /
B
f
when the sub clock is running.
f
1. Rewrite the PM1 and PM0 registers after the PRC1 bit in the PRCR register is set to "1" (write enable).
2. Rewrite the CM0 register after the PRC0 bit in the PRCR register is set to "1" (write enable).
3. When the PM07 bit is set to "0" (selected in the CM01 and CM00 bits) or the PM15 and PM14 bits are
4. M32C/84T cannot be used in memory expansion mode and microprocessor mode.
1. Rewrite the PM0 register after the PRC1 bit in the PRCR register is set to "1" (write enable).
2. Rewrite the CM0 register after the PRC0 bit in the PRCR register is set to "1" (write enable).
C32
CAN
0
1
4
00
0
PM07 Bit
0
set to "01
3
G
J
6
u
2
is the sub clock divided by 32. f
o r
has the same frequency as the main clock. It is a clock for the CAN module only.
0 -
, 10
. l
1
1
1
C32
CAN
u
OUT
0
1
p
, 7
0
2
1
(
, 11
PM14 Bit
2
M
pin outputs f
0
2
OUT
OUT
3
(1)
0
" (P5
(1)
2
2
5
1
,
C
Pin in Memory Expansion Mode and Microprocessor Mode
8 /
Pin in Single-Chip Mode
OUT
Page 96
3
, 4
/BCLK), set the CM01 and CM00 bits to "00
CM01 Bit
M
pin function in single-chip mode. Table 9.6 lists CLK
3
CM0 Register
PM0 Register
C
0
0
1
1
2
, f
C
8
PM07 Bit
f o
8 /
or f
4
4
) T
0
1
1
1
1
9
32
5
CM00 Bit
.
C32
(1)
(2)
0
1
0
1
is used as a count source for the timers A and B. f
CM01 Bit
CLK
Outputs fc
P5
Outputs f
Outputs f
0
0
0
1
1
0
CM0 Register
3
(3)
(3)
OUT
I/O port
Pin Function
8
32
CM00 Bit
0
0
1
0
1
0
(2)
(3)
(3)
2
" (I/O port P5
Outputs ALE
Outputs "L" (not P5
Outputs fc
Outputs f
Outputs f
Outputs BCLK
CLK
OUT
3
).
OUT
9. Clock Generation Circuit
8
32
pin function in memory
Pin Function
C32
3
)
is available