M30845FJGP#U3 Renesas Electronics America, M30845FJGP#U3 Datasheet - Page 315

IC M32C MCU FLASH 512K 144LQFP

M30845FJGP#U3

Manufacturer Part Number
M30845FJGP#U3
Description
IC M32C MCU FLASH 512K 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets

Specifications of M30845FJGP#U3

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
R
R
M
22.3 Waveform Generating Function
e
E
3
. v
J
2
0
Table 22.7 Pin Settings for Waveform Generating Function
NOTES:
Table 22.8 Waveform Generating Function Associated Register Settings
Bit configurations and functions vary with channels used.
Registers associated with the waveform generating measurement function must be set after setting registers associated
with the base timer.
C
Waveforms are generated when the value of the base timer matches that of the G1POj register (j=0 to 7).
The waveform generating function has the following three modes :
• Single-phase waveform output mode
• Phase-delayed waveform output mode
• Set/Reset waveform output (SR waveform output) mode
Table 22.7 lists pin settings of the waveform generating function. Table 22.8 lists registers associated with
the waveform generating function.
P7
P7
P7
P7
P7
P7
P7
P8
P11
P11
P11
P11
P14
P14
P14
P14
G1POCRj
G1POj
G1FS
G1FE
j = 0 to 7
1
9
0 .
8 /
B
1. This port is provided in the 144-pin package only.
0
1
3
4
5
6
7
1
Register
0
1
4
/OUTC1
/OUTC1
/OUTC1
/OUTC1
/OUTC1
/OUTC1
/OUTC1
/OUTC1
0
1
2
3
0
1
2
3
0
Pin
/OUTC1
/OUTC1
/OUTC1
/OUTC1
/OUTC1
/OUTC1
/OUTC1
/OUTC1
3
G
J
6
u
o r
0 -
. l
u
0
1
p
, 7
0
6
7
0
1
2
3
4
5
1
(
0 (1)
1 (1)
2 (1)
3 (1)
4 (1)
5 (1)
6 (1)
7 (1)
2
M
0
0
3
MOD2 to MOD0
IVL
RLD
INV
-
FSCj
IFEj
5
2
PS1, PS2, PS5 to PS8
Registers
PS1_0 = 1
PS1_1 = 1
PS1_3 = 1
PS1_4 = 1
PS1_5 = 1
PS1_6 = 1
PS1_7 = 1
PS2_1 = 1
PS5_0 = 1
PS5_1 = 1
PS5_2 = 1
PS5_3 = 1
PS8_0 = 1
PS8_1 = 1
PS8_2 = 1
PS8_3 = 1
C
8 /
Page 292
, 4
Bit
M
3
2
C
f o
8 /
4
4
) T
9
5
Select waveform output mode
Select default output value
Select a timing to reload the value of the G1POj register
Select if output level is inversed
Select when output waveform is inversed
Set to "0" (waveform generating function)
Set to "1" (enables a function on channel j)
PSL1, PSL2 Registers
PSL1_0 = 0
PSL1_1 = 0
PSL1_3 = 0
PSL1_4 = 0
PSL1_5 = 1
PSL1_6 = 0
PSL1_7 = 1
PSL2_1 = 1
-
Bit and Setting
22. Intelligent I/O (Waveform Generating Function)
Function
PSC, PSC2 Registers PSD1 Register
PSC_0 = 1
PSC_1 = 1
PSC_3 = 1
PSC_4 = 1
-
PSC_6 = 0
-
PSC2_1=1
-
PSD1_0=1
PSD1_1=1
-
-
-
PSD1_6=1
-
-
-