M30845FJGP#U3 Renesas Electronics America, M30845FJGP#U3 Datasheet - Page 278

IC M32C MCU FLASH 512K 144LQFP

M30845FJGP#U3

Manufacturer Part Number
M30845FJGP#U3
Description
IC M32C MCU FLASH 512K 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets

Specifications of M30845FJGP#U3

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
M
R
R
e
E
3
. v
J
2
Table 18.3 Repeat Mode Specifications
0
Function
Start Condition
Stop Condition
Interrupt Request Generation Timing • When the DUS bit in the AD0CON3 register is set to "0" (DMAC operating
Analog Voltage Input Pins
Reading of A/D Conversion Result • When the DUS bit is set to "0", the microcomputer reads the AD0j register (j=0 to
C
18.1.2 Repeat Mode
1
9
8 /
0 .
B
In repeat mode, analog voltage applied to a selected pin is repeatedly converted to a digital code. Table
18.3 lists specifications of repeat mode.
0
1
4
0
G
3
J
6
u
o r
0 -
. l
u
0
1
p
, 7
0
Item
1
(
2
M
0
3
0
2
5
C
8 /
Page 255
, 4
M
3
2
C
8 /
f o
The CH2 to CH0 bits in the AD0CON0 register, the OPA1 and OPA0 bits in the
AD0CON1 register and the APS1 and APS0 bits in the AD0CON2 register select a
pin. Analog voltage applied to the pin is repeatedly converted to a digital code
Same as one-shot mode
The ADST bit in the AD0CON0 register is set to "0" (A/D conversion stopped) by
program
• When DUS bit is set to "1" (DMAC operating mode enabled), an interrupt request
Select one pin from ANi
• When DUS bit is set to "1", do not read the AD00 register. A/D conversion result
4
4
is generated every time an A/D conversion is completed.
7) corresponding to the selected pin.
mode disabled), no interrupt request is generated.
is stored in the AD00 register after the A/D conversion is completed. DMAC
transfers the conversion result to any memory space.
Refer to 13. DMAC for DMAC settings
) T
9
5
0
to ANi
7
Specification
(i=none, 0, 2, 15), ANEX0 or ANEX1
18. A/D Converter