M30845FJGP#U3 Renesas Electronics America, M30845FJGP#U3 Datasheet - Page 300

• Manufacturer Part Number: M30845FJGP#U3
• Description: IC M32C MCU FLASH 512K 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30845FJGP#U3

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 121
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 34x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M
R
R
e
E
3
. v
J
2
0
Figure 22.4 G1BCR1 Register
C
1
9
8 /
0 .
B
0
1
4
0
G
3
J
6
u
o r
0 -
. l
Base Timer Control Register 11
b7
u
NOTES:
0
1
p
, 7
0
b6
1. The base timer is reset two f
2. The IPSA_0 bit in the IPSA register can select the INT0 or INT1 pin.
3. In two-phase pulse signal processing mode, the base timer is not reset, even when the RST1 bit is set
1
(
2
M
register. (See Figure 22.7 for details on the G1PO0 register.) When the RST1 bit is set to "1", the
value of the G1POj register (j=1 to 7) for the waveform generating function and communication
function must be set to a value smaller than that of the G1PO0 register.
to "1", if the counter is decremented two clock cycles after the base timer matches the value set in the
G1PO0 register.
0
b5
3
0
2
5
b4
C
8 /
Page 277
b3
0
, 4
b2
M
3
b1
2
C
b0
8 /
f o
4
4
Symbol
RST1
RST2
) T
9
UD0
UD1
BTS
(b0)
(b3)
(b7)
Bit
5
Symbol
G1BCR1
BT1
clock cycles after the base timer matches the value set in the G1PO0
Base Timer Reset
Cause Select Bit 1
Base Timer Reset
Cause Select Bit 2
Base Timer
Start Bit
Counter Increment/
Decrement Control Bit
Reserved Bit
Nothing is assigned. When write, set to "0".
When read, its content is indeterminate.
Nothing is assigned. When write, set to "0".
When read, its content is indeterminate.
Bit Name
Address
0123
b6
0
0
1
1
0: The base timer is not reset by
1: The base timer is reset by matching
0: The base timer is not reset by
1: The base timer is reset by applying
Set to "0"
0: Base timer is reset
1: Base timer starts counting
b5
0
1
0
1
applying "L" to the INT0 or INT1 pin
"L" to the INT0 or INT1 pin
matching with the G1PO0 register
with the G1PO0 register
16
: Counter increment mode
: Counter increment/decrement mode
: Two-phase pulse signal processing
: Do not set to this value
mode
(3)
Function
After Reset
X000 000X
(1)
(2)
2
22. Intelligent I/O
RW
RW
RW
RW
RW
RW
RW