M30845FJGP#U3 Renesas Electronics America, M30845FJGP#U3 Datasheet - Page 430
Manufacturer Part Number
IC M32C MCU FLASH 512K 144LQFP
Renesas Electronics America
Specifications of M30845FJGP#U3
CAN, I²C, IEBus, SIO, UART/USART
DMA, PWM, WDT
Number Of I /o
Program Memory Size
512KB (512K x 8)
Program Memory Type
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
A/D 34x10b, D/A 2x8b
-40°C ~ 85°C
Package / Case
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
25.3.4 Precautions in CPU Rewrite Mode
188.8.131.52 Operating Speed
184.108.40.206 Prohibited Instructions
220.127.116.11 Interrupts (EW Mode 0)
18.104.22.168 Interrupts (EW Mode 1)
22.214.171.124 How to Access
126.96.36.199 Rewriting in the User ROM Area (EW Mode 0)
188.8.131.52 Rewriting in the User ROM Area (EW Mode 1)
184.108.40.206 DMA Transfer
Set the MCD4 to MCD0 bits in the MCD register to CPU clock frequency of 10 MHz or less before
entering CPU rewrite mode (EW mode 0 or EW mode 1). Also, set the PM12 bit in the PM1 register to
"1" (wait state).
The following instructions cannot be used in EW mode 0 because the CPU tries to read data in the flash
memory: the UND instruction, INTO instruction, JMPS instruction, JSRS instruction, and BRK instruction.
To set the FMR01, FMR02 in the FMR0 register or FMR11 bit in the FMR1 register to "1", set to "1"
in 8-bit units immediately after setting to "0". Do not generate an interrupt or a DMA transfer between
the instruction to set the bit to "0" and the instruction to set the bit to "1". Set the bit while a high-level
("H") signal is applied to the NMI pin.
To change the FMR01 bit from "1" to "0", enter read array mode first, and write into address 0057
16-bit units. Eight high-order bits must be set to "00
If the supply voltage drops while rewriting the block where the rewrite control program is stored, the
flash memory cannot be rewritten because the rewrite control program is not rewritten as expected. If
this error occurs, rewrite the user ROM area while in standard serial I/O mode or parallel I/O mode.
In EW mode 1, do not generate a DMA transfer while the FMR00 bit in the FMR0 register is set to "0"
(busy-programming or erasing).
• To use interrupts having vectors in a relocatable vector table, the vectors must be relocated to the
• The NMI and watchdog timer interrupts are available since the FMR0 and FMR1 registers are forc-
• The address match interrupt is not available since the CPU tries to read data in the flash memory.
• Do not acknowledge any interrupts with vectors in the relocatable vector table or address match
• Do not use the watchdog timer interrupt.
• The NMI interrupt is available since the FMR0 and FMR1 registers are forcibly reset when either
Do not rewrite the block where the rewrite control program is stored.
ibly reset when either interrupt occurs. Allocate the forward addresses for each interrupt routine to
the fixed vector table. Flash memory rewrite operation is aborted when the NMI or watchdog timer
interrupt occurs. Execute the rewrite program again after exiting the interrupt routine.
interrupt during the auto program or auto erase period.
interrupt occurs. Allocate the forward address for the interrupt routine to the fixed vector table. Flash
memory rewrite operation is aborted when the NMI interrupt occurs. Execute the rewrite program
again after exiting the interrupt routine.
25. Flash Memory Version