MPC561MZP56 Freescale Semiconductor, MPC561MZP56 Datasheet - Page 982

• Manufacturer Part Number: MPC561MZP56
• Description: IC MPU 32BIT 56MHZ PPC 388-PBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC561MZP56

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 56MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• Controller Family/series: POWER 5xx
• No. Of I/o's: 56
• Ram Memory Size: 31KB
• Cpu Speed: 56MHz
• No. Of Timers: 32
• Embedded Interface Type: QSPI, SCI, UART
• No. Of Pwm Channels: 12
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 56
• Number Of Timers: 22
• Operating Supply Voltage: 2.6 V to 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (10 bit, 32 Channel)
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: No

READI Module
24-14
RCPU
Bits
1:25
RSTI
RSTI
RSTI
RSTI
RSTI
Field SC
Field
Field
Field
Field
26
Addr
0
MSB
Nexus
79
63
47
31
15
78:54
Bits
79
53
78
62
46
30
14
RWAD
Name
RW
SC
77
61
45
29
13
Table 24-11. RWA Read/Write Access Bit Descriptions
Figure 24-7. READI Read/Write Access Register
76
60
44
28
12
The start complete (SC) field is set when a read or write access is initiated. The
device will clear the SC bit once the read or write access completes. During a block
access, if the SC bit is reset, the access will terminate.
0 Access complete
1 Start access
Read/write address (RWAD) bits are used to identify the address of internal
memory-mapped resources to be accessed, or the lowest address (i.e., lowest
unsigned value) for a block move (CNT > 0). The address range for a block move is
from RWAD to RWAD + CNT.
NOTE: The RWD field of the UDI register is shared with the WD field of the RWA
register.
The read/write (RW) field can be configured to allow selection of a read or a write
access.
0 Read access
1 Write access
MPC561/MPC563 Reference Manual, Rev. 1.2
75
59
43
27
11
RWAD
74
58
42
26
10
0000_0000_0000_0000
0000_0000_0000_0000
0000_0000_0000_0000
WD
0000_0000_0000_0000
0000_0000_0000_0000
73
57
41
25
9
72
56
40
24
8
0x0F
CNT
WD
RWAD
71
55
39
23
7
Description
70
54
38
22
6
RW
69
53
37
21
5
68
52
36
20
4
SZ
67
51
35
19
3
Freescale Semiconductor
66
50
34
18
2
PRV
WD
65
49
33
17
1
MAP
LSB
64
48
32
16
0