MPC561MZP56 Freescale Semiconductor, MPC561MZP56 Datasheet - Page 779

IC MPU 32BIT 56MHZ PPC 388-PBGA

MPC561MZP56

Manufacturer Part Number
MPC561MZP56
Description
IC MPU 32BIT 56MHZ PPC 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheet

Specifications of MPC561MZP56

Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Controller Family/series
POWER 5xx
No. Of I/o's
56
Ram Memory Size
31KB
Cpu Speed
56MHz
No. Of Timers
32
Embedded Interface Type
QSPI, SCI, UART
No. Of Pwm Channels
12
Rohs Compliant
No
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
CAN, JTAG, QSPI, SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
22
Operating Supply Voltage
2.6 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No

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17.10.1 MPWMSM Terminology
Terminology used in the MIOS14 pulse width modulation submodule includes the following:
Bits of resolution
Resolution
17.10.2 MPWMSM Features
Freescale Semiconductor
Counter
Clock
Output pulse width modulated (PWM) signal generation with no software intervention
Built-in 8-bit programmable prescaler clocked by the MCPSM
16-bit Down Counter
Next Period Register
8- bit Prescaler
MPWMCNTR
MPWMPERR
PS7 - PS0
(Ncount)
The MPWMSM contains a 16-bit modulus down-counter that counts from the
desired loaded value to 0x0001. The term “bits of resolution” is used in this
document to indicate the size of the equivalent free running binary counter. To
cover the worst case, the number of bits is rounded to the lower number. For
example, if the counter is preset with a value between 128 and 255, it is said to
have seven bits of resolution. If it is preset with a value between 256 and 511, it is
said to have eight bits of resolution, and so on.
The term “resolution” is used in this document to define the minimum MPWMSM
output increment in time units.
= 0x0001
FLAG
Request Bus
MPC561/MPC563 Reference Manual, Rev. 1.2
Figure 17-25. MPWMSM Block Diagram
LOAD
FREN
EN
Pulse Width Register
Next Pulse Width
<= Comparator
MPWMPULR1
MPWMPULR2
Register
16-bit
TRSP
Submodule bus
Flip-Flop
Output
EN
Modular Input/Output Subsystem (MIOS14)
Output
POL
Buffer
PIN
Output
Logic
DDR
Output
Signal
Output
Logic
17-47

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