MPC561MZP56 Freescale Semiconductor, MPC561MZP56 Datasheet - Page 778

• Manufacturer Part Number: MPC561MZP56
• Description: IC MPU 32BIT 56MHZ PPC 388-PBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC561MZP56

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 56MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• Controller Family/series: POWER 5xx
• No. Of I/o's: 56
• Ram Memory Size: 31KB
• Cpu Speed: 56MHz
• No. Of Timers: 32
• Embedded Interface Type: QSPI, SCI, UART
• No. Of Pwm Channels: 12
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 56
• Number Of Timers: 22
• Operating Supply Voltage: 2.6 V to 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (10 bit, 32 Channel)
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: No

Modular Input/Output Subsystem (MIOS14)
17.10 MIOS14 Pulse Width Modulation Submodule (MPWMSM)
The MIOS14 pulse width modulation submodule (MPWMSM) is a function included in the MIOS14
library. It allows pulse width modulated signals to be generated over a wide range of frequencies,
independently of other MIOS14 output signals and with no software intervention. The output pulse width
can vary from 0% to 100%. The minimum pulse width is twice the minimum MIOS14 CLOCK period
(i.e., the minimum pulse width is 50 ns when f
double-buffered mode, to avoid spurious update.
The following sections describe the MPWMSM in detail. A block diagram of the MPWMSM is shown in
Figure
17-46
MDASM Control Register Bits
17-25.
MODE
1110
1111
MDASM
MDASM
MDASM
MDASM
MDASM
MDASM
MDASM
MDASM
MDASM
MDASM
Module
Sub-
Type
Table 17-22. MDASM Mode Selects (continued)
Table 17-23. MDASM Counter Bus Selection
MPC561/MPC563 Reference Manual, Rev. 1.2
Resolution
Number
Bits of
Block
11
12
13
14
15
27
28
29
30
31
9
7
BSL0=0
BSL1=0
SYS
Bus Bits
Counter
Ignored
CBA
CB6
CB6
CB6
CB6
CB6
CB6
CB6
CB6
CB6
CB6
0-6
0-8
is 40 MHz). The MWPMSM can run in a
BSL0=1
BSL1=0
OPWM – Output pulse width modulation
OPWM – Output pulse width modulation
CB22
CB22
CB22
CB22
CB22
CB22
CB22
CB22
CB22
CB22
CBB
Connected to:
MDASM Mode of Operation
BSL0=0
BSL1=1
CB23
CB23
CB23
CB23
CB23
CBC
CB7
CB7
CB7
CB7
CB7
BSL0=1
BSL1=1
CB24
CB24
CB24
CB24
CB24
CBD
CB8
CB8
CB8
CB8
CB8
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