MPC561MZP56 Freescale Semiconductor, MPC561MZP56 Datasheet - Page 322

• Manufacturer Part Number: MPC561MZP56
• Description: IC MPU 32BIT 56MHZ PPC 388-PBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC561MZP56

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 56MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• Controller Family/series: POWER 5xx
• No. Of I/o's: 56
• Ram Memory Size: 31KB
• Cpu Speed: 56MHz
• No. Of Timers: 32
• Embedded Interface Type: QSPI, SCI, UART
• No. Of Pwm Channels: 12
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 56
• Number Of Timers: 22
• Operating Supply Voltage: 2.6 V to 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (10 bit, 32 Channel)
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: No

Clocks and Power Control
1
2
3
8-20
Software is active only in normal-high/low modes.
TEXPS receives the zero value by writing one. Writing of zero has no effect on TEXPS.
The switch from normal-high to normal-low is enable only if the conditions to asynchronous interrupt are cleared.
Software
Software
Software
Software
Software
Software
1
1
1
1
1
1
Normal-Low
LPM = 00, CSRC = 1
Doze-Low
LPM = 01, CSRC = 1
Doze-High
LPM = 01, CSRC = 0/1
Sleep Mode
LPM = 10, CSRC = 0
Deep-Sleep Mode
LPM = 11, CSRC = 0,
TEXPS = 1
Power-Down Mode
LPM = 11, CSRC = 0,
TEXPS = 0
Figure 8-9. Low-Power Modes Flow Diagram
MPC561/MPC563 Reference Manual, Rev. 1.2
2
((MSR[POW]+Interrupt))*CSRC
(MSR[POW]+Interrupt)+PLPRCR[CSRC]
RTC/PIT/TB/DEC Interrupt
followed by External Hard Reset
RTC/PIT/TB/DEC
Async. Wake-up or
Wake-up:
Frequency Clocks
Hard Reset
Software
Wake-up: 3 - 4 SysFreq
Asynchronous
Wake-up: 3 - 4 Sys
Freqmax
Interrupts
Interrupt
1
500 Input
Clocks
Clocks
Interrupt
3
Freescale Semiconductor
Normal
High Mode
LPM = 00
CSRC = 0/1