MPC561MZP56 Freescale Semiconductor, MPC561MZP56 Datasheet - Page 267

• Manufacturer Part Number: MPC561MZP56
• Description: IC MPU 32BIT 56MHZ PPC 388-PBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC561MZP56

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 56MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• Controller Family/series: POWER 5xx
• No. Of I/o's: 56
• Ram Memory Size: 31KB
• Cpu Speed: 56MHz
• No. Of Timers: 32
• Embedded Interface Type: QSPI, SCI, UART
• No. Of Pwm Channels: 12
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 56
• Number Of Timers: 22
• Operating Supply Voltage: 2.6 V to 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (10 bit, 32 Channel)
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: No

Freescale Semiconductor
00 (multiple chip, 32-bit port size)
01 (multiple chip, 16-bit port size
10 (single-chip with address show
cycles for debugging)
11 (single-chip)
DBGC
00
01
11
10
IWP[0:1]/VFLS[0:1]
VFLS[0:1]
VFLS[0:1]
IWP[0:1]
IWP[0:1]
GPC
SC
00
01
10
11
Table 6-10. Single-Chip Select Field Pin Configuration
MPC561/MPC563 Reference Manual, Rev. 1.2
Table 6-9. General Pins Configuration
FRZ/PTR/SGPIOC6
Table 6-8. Debug Pins Configuration
SGPIOC6
BI/STS
PTR
FRZ
FRZ
STS
STS
STS
BI
SGPIOD[0:15]
SPGIOD[0:15]
SPGIOD[0:15]
DATA[0:15]/
Pin Function
DATA[0:15]
DATA[0:15]
Pin Function
BG/VF0/LWP1
LWP1
VF0
BG
BG
IRQOUT/LWP0/SGPIOC7
SGPIOC7
IRQOUT
LWP0
LWP0
SGPIOD[16:31]
SPGIOD[16:31]
SPGIOD[16:31]
SPGIOD[16:31]
Pin Function
DATA[16:31]
BR/VF1/IWP2
DATA[16:31]
IWP2
VF1
BR
BR
System Configuration and Protection
BB/VF2/IWP3
SGPIOA[8:31]
SPGIOA[8:31]
ADDR[8:31]/
ADDR[8:31]
ADDR[8:31]
ADDR[8:31]
IWP3
VF2
BB
BB
6-27