MPC561MZP56 Freescale Semiconductor, MPC561MZP56 Datasheet - Page 1117
![IC MPU 32BIT 56MHZ PPC 388-PBGA](/photos/12/22/122270/mpc561mzp56_sml.jpg)
MPC561MZP56
Manufacturer Part Number
MPC561MZP56
Description
IC MPU 32BIT 56MHZ PPC 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheet
1.MPC561MZP56.pdf
(1420 pages)
Specifications of MPC561MZP56
Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Controller Family/series
POWER 5xx
No. Of I/o's
56
Ram Memory Size
31KB
Cpu Speed
56MHz
No. Of Timers
32
Embedded Interface Type
QSPI, SCI, UART
No. Of Pwm Channels
12
Rohs Compliant
No
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
CAN, JTAG, QSPI, SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
22
Operating Supply Voltage
2.6 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MPC561MZP56
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MPC561MZP56R2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Freescale Semiconductor
0x2F C10C
0x2F C110
0x2F C114
0x2F C118
0x2F C11C
0x2F C120 –
0x2F C13C
0x2F C140
0x2F C144
0x2F C148 –
0x2F C174
0x2F C178
0x2F C200
0x2F C204
0x2F C208
0x2F C20C –
0x2F C21C
0x2F C220
0x2F C224
0x2F C228
0x2F C22C
0x2F C230 –
0x2F C23C
0x2F C240
Address
Access
U
U
U
U
U
U
U
—
—
—
T
—
U
U
U
U
U
U
U
U
4
3
3
3
4
4
4
3
Table B-5. USIU (Unified System Interface Unit) (continued)
TBREF0
TBREF1
Symbol
TBSCR
RTCSC
RTSEC
RTCAL
DMOR
MSTAT
PISCR
DMBR
OR1
OR2
OR3
RTC
BR2
BR3
MPC561/MPC563 Reference Manual, Rev. 1.2
—
—
—
—
System Integration Timers
Option Register 1.
See
Base Register 2.
See
Option Register 2.
See
Base Register 3.
See
Option Register 3.
See
Reserved
Dual-Mapping Base Register.
See
Dual-Mapping Option Register.
See
Reserved
Memory Status.
See
Time Base Status and Control.
See
Time Base Reference 0.
See
Time Base Reference 1.
See
Reserved
Real-Time Clock Status and Control.
See
Real-Time Clock.
See
Real-Time Alarm Seconds. Reserved
Real-Time Alarm.
See
Reserved
PIT Status and Control.
See
Table 10-10
Table 10-8
Table 10-10
Table 10-8
Table 10-10
Table 10-11
Table 10-12
Table 10-7
Table 6-18
Section 6.2.2.4.3
Section 6.2.2.4.3
Table 6-19
Section 6.2.2.4.6
Section 6.2.2.4.7
Table 6-20
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
Register
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
Size
Internal Memory Map
32
32
32
32
32
32
32
16
16
32
32
16
32
32
32
16
—
—
—
—
Reset
—
—
—
—
—
H
H
H
H
H
H
H
H
H
U
U
H
U
U
H
B-7
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