MPC561MZP56 Freescale Semiconductor, MPC561MZP56 Datasheet - Page 799

IC MPU 32BIT 56MHZ PPC 388-PBGA

MPC561MZP56

Manufacturer Part Number
MPC561MZP56
Description
IC MPU 32BIT 56MHZ PPC 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheet

Specifications of MPC561MZP56

Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Controller Family/series
POWER 5xx
No. Of I/o's
56
Ram Memory Size
31KB
Cpu Speed
56MHz
No. Of Timers
32
Embedded Interface Type
QSPI, SCI, UART
No. Of Pwm Channels
12
Rohs Compliant
No
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
CAN, JTAG, QSPI, SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
22
Operating Supply Voltage
2.6 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No

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As this register is read only, a write to this register has no other effect than generating a bus error if the bus
error option is selected.
17.12.4 MIRSM1 Interrupt Registers
17.12.4.1 Interrupt Status Register (MIOS14SR1)
This register contains the flag bits that are raised when the submodules generate an interrupt. Each bit
corresponds to a given submodule.
Freescale Semiconductor
SRESET
SRESET
10:15
Bits
Field IRP15 IRP14 IRP13 IRP12 IRP1
Addr
10:15
0:4
5:6
7:9
Bits
Field FLG
0:4
5:6
7:9
Addr
MSB
IRP15:1
0
IRP8:6
IRP5:0
MSB
Name
31
FLGL24:22 Flag Bits— MMCSM flag bits [24:22]
0
FLG31:27
FLG21:16
1
Name
1
FLG
Figure 17-37. Interrupt Request Pending Register (MIOS14RPR0)
30
1
Pending Bits — MDASM pending bits [15:11]
Reserved
Pending Bits — MMCSM pending bits [8:6]
Pending Bits — PWMSM pending bits [5:0]
2
Flag Bits — MDASM flag bits [31:27]
Reserved
Flag Bits — PWMSM flag bits [21:16]
FLG
Figure 17-38. Interrupt Status Register (MIOS14SR1)
29
2
3
Table 17-37. MIOS14PR0 Bit Descriptions
Table 17-38. MIOS14SR1 Bit Descriptions
FLG
MPC561/MPC563 Reference Manual, Rev. 1.2
28
3
4
FLG
27
4
5
5
0000_0000_0000_0000
0000_0000_0000_0000
6
6
IRP8 IRP7 IRP6 IRP5 IRP4 IRP3 IRP2 IRP1 IRP0
0x30 6C06
0x30 6C40
FLG
7
24
7
Description
Description
FLG
8
23
8
FLG
22
9
9
FLG
21
10
10
Modular Input/Output Subsystem (MIOS14)
FLG
20
11
11
FLG
19
12
12
FLG
18
13
13
FLG
17
14
14
FLG
LSB
16
15
LSB
15
17-67

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