MPC561MZP56 Freescale Semiconductor, MPC561MZP56 Datasheet - Page 260
![IC MPU 32BIT 56MHZ PPC 388-PBGA](/photos/12/22/122270/mpc561mzp56_sml.jpg)
MPC561MZP56
Manufacturer Part Number
MPC561MZP56
Description
IC MPU 32BIT 56MHZ PPC 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheet
1.MPC561MZP56.pdf
(1420 pages)
Specifications of MPC561MZP56
Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Controller Family/series
POWER 5xx
No. Of I/o's
56
Ram Memory Size
31KB
Cpu Speed
56MHz
No. Of Timers
32
Embedded Interface Type
QSPI, SCI, UART
No. Of Pwm Channels
12
Rohs Compliant
No
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
CAN, JTAG, QSPI, SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
22
Operating Supply Voltage
2.6 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MPC561MZP56
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MPC561MZP56R2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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System Configuration and Protection
is not affected by reset and operates in all low-power modes. It is initialized by software. The RTC can be
programmed to generate a maskable interrupt when the time value matches the value programmed in its
associated alarm register. It can also be programmed to generate an interrupt once a second. A control and
status register is used to enable or disable the different functions and to report the interrupt source.
6.1.9
The periodic interrupt timer consists of a 16-bit counter clocked by the PITRTCLK clock signal supplied
by the clock module as shown in
The 16-bit counter counts down to zero when loaded with a value from the PITC register. After the timer
reaches zero, the PS bit is set and an interrupt is generated if the PIE bit is a logic one. The software service
routine should read the PS bit and then write a zero to terminate the interrupt request. At the next input
clock edge, the value in the PITC is loaded into the counter, and the process starts over again.
When a new value is written into the PITC, the periodic timer is updated, the divider is reset, and the
counter begins counting. If the PS bit is not cleared, an interrupt request is generated. The request remains
pending until PS is cleared. If the PS bit is set again prior to being cleared, the interrupt remains pending
until PS is cleared.
Any write to the PITC stops the current countdown, and the count resumes with the new value in PITC. If
the PISCR[PTE] bit is not set, the PIT is unable to count and retains the old count value. Reads of the PIT
have no effect on the counter value.
6-20
PITRTCLK
Clock
Periodic Interrupt Timer (PIT)
PITRTCLK can be divided by 4 or 256. See
Disable
FREEZE
Clock
MPC561/MPC563 Reference Manual, Rev. 1.2
Figure
Figure 6-7. RTC Block Diagram
By 15625
By 78125
RTSEC
6-8.
Divide
Divide
4-MHz/20-MHz crystal
NOTE
MUX
Table 8-1
32-bit Register (RTCAL)
32-bit Counter (RTC)
for default settings.
=
Freescale Semiconductor
Interrupt
Interrupt
Alarm
Sec
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