MPC561MZP56 Freescale Semiconductor, MPC561MZP56 Datasheet - Page 374

• Manufacturer Part Number: MPC561MZP56
• Description: IC MPU 32BIT 56MHZ PPC 388-PBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC561MZP56

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 56MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• Controller Family/series: POWER 5xx
• No. Of I/o's: 56
• Ram Memory Size: 31KB
• Cpu Speed: 56MHz
• No. Of Timers: 32
• Embedded Interface Type: QSPI, SCI, UART
• No. Of Pwm Channels: 12
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 56
• Number Of Timers: 22
• Operating Supply Voltage: 2.6 V to 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (10 bit, 32 Channel)
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: No

External Bus Interface
9.5.7.3
BB assertion indicates that the current bus master is using the bus. New masters should not begin transfer
until this signal is negated. The bus owner should not relinquish or negate this signal until the transfer is
complete. To avoid contention on the BB line, the master should three-state this signal when it gets a
logical one value. This requires the connection of an external pull-up resistor to ensure that a master that
acquires the bus is able to recognize the BB line negated, regardless of how many cycles have passed since
the previous master relinquished the bus. Refer to
9-34
MPC500 Device
(Slave 1)
Bus Busy
Figure 9-25. Master Signals Basic Connection
MPC561/MPC563 Reference Manual, Rev. 1.2
External Bus
TS
BB
Figure
9-25.
Slave 2
Freescale Semiconductor
Master