MPC561MZP56 Freescale Semiconductor, MPC561MZP56 Datasheet - Page 298

IC MPU 32BIT 56MHZ PPC 388-PBGA

MPC561MZP56

Manufacturer Part Number
MPC561MZP56
Description
IC MPU 32BIT 56MHZ PPC 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheet

Specifications of MPC561MZP56

Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Controller Family/series
POWER 5xx
No. Of I/o's
56
Ram Memory Size
31KB
Cpu Speed
56MHz
No. Of Timers
32
Embedded Interface Type
QSPI, SCI, UART
No. Of Pwm Channels
12
Rohs Compliant
No
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
CAN, JTAG, QSPI, SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
22
Operating Supply Voltage
2.6 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC561MZP56
Manufacturer:
FREESCALE
Quantity:
852
Part Number:
MPC561MZP56
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MPC561MZP56
Manufacturer:
FREESCALE
Quantity:
852
Company:
Part Number:
MPC561MZP56
Quantity:
13
Part Number:
MPC561MZP56R2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Reset
7-10
RSTCONF
CLKOUT
HRESET
Figure 7-5. Reset Configuration Timing for “Long” PORESET Assertion, Limp Mode Disabled
CLKOUT
PORESET
Internal
HRESET
Internal data[0:31]
Internal
PORESET
RSTCONF
reset
DATA
Sample Data Configuration
1
Figure 7-6. Reset Configuration Sampling Timing Requirements
Reset Configuration Word
2
Tsup = Minimum Setup time of reset recognition = 15 clocks
3
MPC561/MPC563 Reference Manual, Rev. 1.2
8
8
Default
9
10
PLL lock
Sample Data Configuration
8
9
(maximum rise time - up to 6 clocks)
Maximum time of reset recognition
RSTCONF Controlled
10
11
12
Tsup
13
Freescale Semiconductor
14
15
16

Related parts for MPC561MZP56