MPC561MZP56 Freescale Semiconductor, MPC561MZP56 Datasheet - Page 1415

• Manufacturer Part Number: MPC561MZP56
• Description: IC MPU 32BIT 56MHZ PPC 388-PBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC561MZP56

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 56MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• Controller Family/series: POWER 5xx
• No. Of I/o's: 56
• Ram Memory Size: 31KB
• Cpu Speed: 56MHz
• No. Of Timers: 32
• Embedded Interface Type: QSPI, SCI, UART
• No. Of Pwm Channels: 12
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 56
• Number Of Timers: 22
• Operating Supply Voltage: 2.6 V to 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (10 bit, 32 Channel)
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: No

Remote
reservation of data 11-7
reservation protocol for a multi-level (local) bus, 9-43
Reserved
Reset
Resistor-divider chain 13-36
Resolution time 13-35
Result word table 13-2
Resynchronization jump width (RJW) bit field 16-30
RETRY, 9-45
R
RIE 15-48
RJURR 13-33
RJW 16-13
RN field 3-16
RSR 7-5
RSV, 9-38
RT 15-57
RTC 6-19
RTC register 6-43
RTCAL 6-44
RTCSC 6-42
RTR 16-5
RTR field 16-6
RWA 24-13
RWU 15-48
RX14MSKHI 16-32
RX14MSKLO 16-32
RX15MSKHI 16-33
Freescale Semiconductor
F
TPU module configuration register 2
TPU module configuration register 3
TPU support status register (DSSR) 19-13
transfer error status register (TESR) 6-39
UC3F configuration register (UC3FMCR) 21-5
UC3F extended configuration register
UC3F high voltage control register (UC3FCTL) 21-11
UIMB 12-6
UIMB module configuration register (UMCR) 12-7
USIU special purpose registers 5-6
frames 16-17
transmission request (RTR) 16-5
transmission request field (RTR) 16-6
channel number 13-31
mode 13-41
BBC behavior 4-6
configuration 7-7
soft reset configuration 7-13
sources of 7-3
status register 7-5
13-75
(TPUMCR2) 19-19
(TPUMCR3) 19-21
(UC3FMCRE) 21-8
,
,
14-73
16-17
,
,
16-30
15-59
,
,
14-42
14-35
,
,
14-36
13-32
,
14-37
,
13-37
,
14-2
MPC561/MPC563 Reference Manual, Rev. 1.2
,
14-34
,
14-38
RX15MSKLO 16-33
RXECTR 16-36
RXGMSKHI 16-31
RXGMSKLO 16-31
RXWARN 16-34
S
S0 15-9
SAMP 16-29
Sample amplifier bypass (BYP) 13-30
Sampling mode (SAMP) 16-29
SAR 13-37
SBK 15-48
Scan modes
SCBR 15-46
SCCR 8-30
SCCR0 15-46
SCCR1 15-47
SCDR 15-50
SCI 15-34
SCI Control Register 0 (SCCR0) 15-46
continuous-scan modes
single-scan modes
baud
idle-line detection 15-58
internal loop 15-59
operation 15-51
parity checking 15-53
pins 15-51
queue 15-59
receiver
registers 15-45
SCCR0 15-46
SCCR1 15-46
SCI Baud Rates 15-53
SCI SUBMODULE 15-13
SCSR 15-45
transmitter
external trigger 13-46
periodic timer continuous-scan mode 13-47
software initiated 13-45
external trigger 13-43
interval timer 13-44
software initiated 13-42
clock 15-52
rate (SCBR) 15-46
block diagram 15-44
operation 15-57
wakeup 15-58
block diagram 15-43
operation 15-54
equation 15-46
,
,
,
15-42
14-38
15-54
,
14-45
,
,
14-47
14-44
,
,
14-46
14-43
,
14-31
,
14-48
Index-15