HFC-S2M Cologne Chip AG, HFC-S2M Datasheet - Page 91

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HFC-S2M

Manufacturer Part Number
HFC-S2M
Description
Isdn HDLC Fifo Controller With Primary Rate Interface
Manufacturer
Cologne Chip AG
Datasheet
March 2003 (rev. A)
HFC-E1
R_CHIP_ID
Chip identification register
3..0
7..4
R_CHIP_RV
HFC-E1 revision
3..0
7..4
Bits
Bits
0
0xE
1
0
Value
Value
Reset
Reset
V_PNP_IRQ
V_CHIP_ID
V_CHIP_RV
(reserved)
Name
Name
(read only)
(read only)
Data Sheet
Data flow
Description
IRQ assigned by the PnP BIOS
(only in ISA PnP mode)
V_IRQ_SEL of the R_CIRM register must be set
to the value corresponding to the hardware
connected IRQ lines.
Chip identification code
’1110’ means HFC-E1.
Description
Chip revision 1
(Engineering samples were revision 0.)
Cologne
Chip
91 of 272
0x1F
0x16

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