HFC-S2M Cologne Chip AG, HFC-S2M Datasheet - Page 192

• Manufacturer Part Number: HFC-S2M
• Description: Isdn HDLC Fifo Controller With Primary Rate Interface
• Manufacturer: Cologne Chip AG

HFC-E1
192 of 272
R_SH1H
CODEC enable signal SHAPE1, high byte
This multi-register is selected with bitmap V_PCM_ADDR = 0xF of the regis-
ter R_PCM_MD0.
7..0
Bits
0
Reset
Value
Name
V_SH1H
PCM interface
(write only)
Data Sheet
Description
Shape bits 15 . . . 8
Every bit is used for 1/2 C4IO clock cycle.
Bit 7 of V_SH1H defines the value for the rest of
the period.
March 2003 (rev. A)
Cologne
Chip
0x15