HFC-S2M Cologne Chip AG, HFC-S2M Datasheet - Page 158

• Manufacturer Part Number: HFC-S2M
• Description: Isdn HDLC Fifo Controller With Primary Rate Interface
• Manufacturer: Cologne Chip AG

HFC-E1
158 of 272
R_RX_FR0
E1 receive frame configuration, register 0
0
1
2
3
4
5
6
7
Bits
0
0
0
0
0
0
0
0
Reset
Value
Name
V_NO_INSYNC
V_AUTO_RESYNC
V_AUTO_RECO
V_SWORD_COND
V_SYNC_LOSS
V_XCRC_SYNC
V_MF_RESYNC
V_RESYNC
(write only)
E1 interface
Data Sheet
Automatic error recovery
Description
Transparent mode
’0’ = normal operation
’1’ = no synchronization to input data
Automatic resynchronization
’0’ = normal operation
’1’ = after loss of synchronization the search for
multiframe synchronization pattern is initiated
again
This bit is only valid in CRC multiframe format.
’0’ = normal operation
’1’ = if there are more than 914 CRC errors in one
second the receiver will search for new basic- and
multiframing
This bit is only valid in multiframing synchronous
state.
Service word condition
’0’ = loss of synchronization if there are 3 or 4
(depending on V_SYNC_LOSS) consecutive
incorrect service words
’1’ = incorrect service words have no influence in
synchronous state
Loss of synchronization
’0’ = loss of synchronization if there are 3
consecutive incorrect FAS or service words
’1’ = loss of synchronization if there are 4
consecutive incorrect FAS or service words
Extended CRC4 to non-CRC4
’0’ = according to ITU-T G.706
’1’ = according to ITU-T G.706 except that the
synchronizer will still search for multiframing even
if the 400 ms is expired
Multiframe resynchronization
When this bit is set, the resynchronization of CRC
multiframe alignment is initiated without
influencing doubleframe synchronous state. If
V_AUTO_RESYNC is enabled and multiframe
alignment can not be regained, a new search of
doubleframe is initiated.
Note: This bit is only valid in CRC multiframe
format.
Resynchronization
’1’ = initiate resynchronization of receive frame
March 2003 (rev. A)
Cologne
Chip
0x25