HFC-S2M Cologne Chip AG, HFC-S2M Datasheet - Page 80

• Manufacturer Part Number: HFC-S2M
• Description: Isdn HDLC Fifo Controller With Primary Rate Interface
• Manufacturer: Cologne Chip AG

HFC-E1
Symbol
Ø
Ø
Ø
Ø
Ø
Ø
Ø
Ø
80 of 272
ÏÊ
Á Ä
Ä
Ä À
Ë
À
ÏÊË
ÏÊÀ
½ ¡ Ø
¿ ¡ Ø
¿ ¡ Ø
min / ns
¡ Ø
ÄÃÁ
ÄÃÁ
ÄÃÁ
ÄÃÁ
Table 2.24: Symbols of write accesses in Figures 2.14, 2.16 and 2.18
10
10
10
20
10
20
0
max / ns
Universal external bus interface
Characteristic
Address latch time
ALE
Address and /BE valid to /WR+/CS
Address hold time after /WR+/CS
Write data setup time to /WR+/CS
Write data hold time from /WR+/CS
Write time
/WR+/CS high time
A[7] = ’0’ (address range 0 . . . 0x7F: normal register access)
A[7,6] = ’10’ (address range 0x80 . . . 0xBF: FIFO data access)
A[7,6] = ’11’ (address range 0xC0 . . . 0xFF: direct RAM access)
– after byte access
– after word access
to /WR+/CS
Data Sheet
setup time
March 2003 (rev. A)
Cologne
Chip