HFC-S2M Cologne Chip AG, HFC-S2M Datasheet - Page 29

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HFC-S2M

Manufacturer Part Number
HFC-S2M
Description
Isdn HDLC Fifo Controller With Primary Rate Interface
Manufacturer
Cologne Chip AG
Datasheet
March 2003 (rev. A)
HFC-E1
Pin
17
18
19
20
21
22
23
24
Interface
PCI
ISA PnP
PCMCIA
Processor
SPI
PCI
ISA PnP
PCMCIA
Processor
SPI
PCI
ISA PnP
PCMCIA
Processor
SPI
PCI
ISA PnP
PCMCIA
Processor
SPI
PCI
ISA PnP
PCMCIA
Processor
SPI
PCI
ISA PnP
PCMCIA
Processor
SPI
PCI
ISA PnP
PCMCIA
Processor
SPI
Name
AD16
A0
C/BE2#
/BE2
GND
FRAME#
/CS
IRDY#
/IOR
TRDY#
/IOW
DEVSEL#
/WD
STOP#
ALE
SA0
A0
FL0
/IOIS16
IOIS16#
FL1
/AEN
GND
VDD
/IOR
IORD#
VDD
/IOW
IOWR#
FL1
FL0
OE#
FL0
FL0
WE#
FL0
Ood
Ood
I/O
IO
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
General description
Description
Address / Data bit 16
Address bit 0
Fixed level (low), connect to
Bus command and Byte Enable 2
16 bit access enable
Byte Enable 2
Fixed level (high), connect to
power supply via ext. pull-up
Ground
Cycle Frame
Address Enable
Ground
Chip Select
Initiator Ready
Read Enable
Read Enable
Read Enable
Target Ready
Write Enable
Write Enable
Fixed level (high), connect to
Fixed level (low), connect to
ground via ext. pull-down
Mem. Read
Watch Dog Output
Fixed level (low), connect to
Stop
Fixed level (low), connect to
ground via ext. pull-down
Reg. Write
Address Latch Enable
Fixed level (low), connect to
Address bit 0
Address bit 0
ground via ext. pull-down
16 bit access enable
+3.3 V power supply
+3.3 V power supply
Write Enable
power supply via ext. pull-up
Device Select
PCMCIA Output Enable for Attr.
ground via ext. pull-down
PCMCIA Write Enable for Conf.
ground via ext. pull-down
Data Sheet
(continued from previous page)
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
(continued on next page)
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Cologne
Chip
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29 of 272
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