HFC-S2M Cologne Chip AG, HFC-S2M Datasheet - Page 12

• Manufacturer Part Number: HFC-S2M
• Description: Isdn HDLC Fifo Controller With Primary Rate Interface
• Manufacturer: Cologne Chip AG

HFC-E1
12 of 272
3.7
3.8
4.1
4.2
4.3
5.1
5.2
6.1
6.2
6.3
7.1
7.2
8.1
8.2
9.1
9.2
9.3
9.4
10.1 Overview of the HFC-E1 BERT registers . . . . . . . . . . . . . . . . . . . . . . . 213
11.1 Overview of the HFC-E1 auxiliary bridge registers . . . . . . . . . . . . . . . . . . 219
11.2 HFC-E1 pins of the auxiliary bridge . . . . . . . . . . . . . . . . . . . . . . . . . . 220
11.3 Control mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 222
12.1 Overview of the HFC-E1 clock pins . . . . . . . . . . . . . . . . . . . . . . . . . . 233
12.2 Overview of the HFC-E1 reset, timer and watchdog registers . . . . . . . . . . . . . 233
12.3 Quartz selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 234
12.4 HFC-E1 reset groups . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 235
13.1 Overview of the HFC-E1 general purpose I/O registers . . . . . . . . . . . . . . . . 251
13.2 Adjustable pin groups of the HFC-E1 . . . . . . . . . . . . . . . . . . . . . . . . . 253
Subchannel processing example in SM combined with HDLC mode . . . . . . . . . 117
Subchannel processing example in CSM combined with HDLC mode . . . . . . . . 118
Overview of the HFC-E1 FIFO registers . . . . . . . . . . . . . . . . . . . . . . . . 129
FIFO size setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132
Overview of the HFC-E1 E1 pins . . . . . . . . . . . . . . . . . . . . . . . . . . . 147
Overview of the HFC-E1 E1 interface registers . . . . . . . . . . . . . . . . . . . . 148
Overview of the HFC-E1 PCM interface registers . . . . . . . . . . . . . . . . . . . 177
Overview of the HFC-E1 PCM pins . . . . . . . . . . . . . . . . . . . . . . . . . . 178
PCM interface configuration with bitmaps of the register A_SL_CFG . . . . . . . . 180
Overview of the HFC-E1 PWM pins . . . . . . . . . . . . . . . . . . . . . . . . . . 195
Overview of the HFC-E1 PWM registers . . . . . . . . . . . . . . . . . . . . . . . 195
Overview of the HFC-E1 conference registers . . . . . . . . . . . . . . . . . . . . . 199
Conference example specification . . . . . . . . . . . . . . . . . . . . . . . . . . . 201
Overview of the HFC-E1 DTMF registers . . . . . . . . . . . . . . . . . . . . . . . 207
DTMF tones on a 16 keys keypad . . . . . . . . . . . . . . . . . . . . . . . . . . . 208
16-bit
Memory address calculation for DTMF coefficients related to equation (9.3) . . . . . 210
-counter range with different RAM sizes . . . . . . . . . . . . . . . . . . . . . . . 130
Ã
factors for the DTMF calculation . . . . . . . . . . . . . . . . . . . . . . . 209
Data Sheet
March 2003 (rev. A)
Cologne
Chip