HFC-S2M Cologne Chip AG, HFC-S2M Datasheet - Page 139

• Manufacturer Part Number: HFC-S2M
• Description: Isdn HDLC Fifo Controller With Primary Rate Interface
• Manufacturer: Cologne Chip AG

4.4.2 Read only registers
(See Table 4.3 for reset value.)
(See Table 4.3 for reset value.)
(See Table 4.3 for reset value.)
March 2003 (rev. A)
HFC-E1
A_Z1L [FIFO]
FIFO input counter
This address can also be accessed with word and double word width to read the
complete
A_Z12).
Before reading this array register the FIFO must be selected by the register R_FIFO.
7..0
A_Z1H [FIFO]
FIFO input counter
Before reading this array register the FIFO must be selected by the register R_FIFO.
7..0
A_Z1 [FIFO]
FIFO input counter
Before reading this array register the FIFO must be selected by the register R_FIFO.
15..0
Bits
Bits
Bits
Value
Value
Value
Reset
Reset
Reset
½
-counter or
V_Z1L
V_Z1H
V_Z1
Name
Name
Name
½
½
½
, low byte
, high byte
FIFO handling and HDLC controller
½
- and
(read only)
(read only)
(read only)
¾
Data Sheet
-counters together (see registers A_Z1 and
Description
Bits [7..0] counter value of ½
Description
Bits [15..8] counter value of ½
Description
Bits [15..0] counter value of ½
Cologne
Chip
139 of 272
0x04
0x05
0x04