HFC-S2M Cologne Chip AG, HFC-S2M Datasheet - Page 119

• Manufacturer Part Number: HFC-S2M
• Description: Isdn HDLC Fifo Controller With Primary Rate Interface
• Manufacturer: Cologne Chip AG

3.6 Register description
March 2003 (rev. A)
HFC-E1
R_FIRST_FIFO
First FIFO of the FIFO sequence
This register is only used in FIFO Sequence Mode, see register R_FIFO_MD
for mode selection.
0
5..1
7..6
Bits
0
0x00
Value
Reset
V_FIRST_FIFO_NUM
Name
V_FIRST_FIFO_DIR
(reserved)
(write only)
Data Sheet
Data flow
Description
Data direction
This bit defines the data direction of the first FIFO
in FIFO sequence.
’0’ = transmit FIFO data
’1’ = receive FIFO data
FIFO number
This bitmap defines the number of the first FIFO in
FIFO sequence.
Must be ’00’.
Cologne
Chip
119 of 272
0x0B