HFC-S2M Cologne Chip AG, HFC-S2M Datasheet - Page 90

• Manufacturer Part Number: HFC-S2M
• Description: Isdn HDLC Fifo Controller With Primary Rate Interface
• Manufacturer: Cologne Chip AG

HFC-E1
2.7.2 Read only registers
90 of 272
R_RAM_USE
SRAM duty factor
Usage of SRAM access bandwidth by the internal data processor.
7..0
R_RAM_DATA
SRAM data access
Direct access to internal / external SRAM
7..0
Bits
Bits
0
Reset
Value
Reset
Value
Name
V_SRAM_USE
Name
V_RAM_DATA
Universal external bus interface
(read / write)
(read only)
Data Sheet
SRAM data access
Description
Relative duty factor
0x00 = 0% bandwidth used
0x7C = 100% bandwidth used
Description
The address must be written into the registers
R_RAM_ADDR0 . . . R_RAM_ADDR2 in
advance.
March 2003 (rev. A)
Cologne
Chip
0xC0
0x15