HFC-S2M Cologne Chip AG, HFC-S2M Datasheet - Page 34

• Manufacturer Part Number: HFC-S2M
• Description: Isdn HDLC Fifo Controller With Primary Rate Interface
• Manufacturer: Cologne Chip AG

HFC-E1
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Pin
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
1st function
1st function
1st function
1st function
1st function
1st function
1st function
1st function
1st function
1st function
1st function
1st function
Interface
2nd function
2nd function
2nd function
2nd function
2nd function
2nd function
2nd function
2nd function
2nd function
2nd function
2nd function
2nd function
SRA18
/BRG_CS6
NC
/BRG_CS7
SRD0
BRG_D0
SRD1
BRG_D1
SRD2
BRG_D2
SRD3
BRG_D3
SRD4
BRG_D4
SRD5
BRG_D5
SRD6
BRG_D6
SRD7
BRG_D7
/SR_WR
/BRG_WR
/SR_OE
/BRG_RD
Name
GND
VDD
/SR_CS
GND
VDD
OSC_IN
OSC_OUT
CLK_MODE
GND
VDD
I/O
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
O
O
O
O
O
O
O
O
O
I
I
General description
Miscellaneous
Bridge Chip Select 6
Bridge Chip Select 7
Data bit 0 for external SRAM
Bridge Data bit 0
Data bit 1 for external SRAM
Bridge Data bit 1
Data bit 2 for external SRAM
Bridge Data bit 2
Data bit 3 for external SRAM
Bridge Data bit 3
Data bit 4 for external SRAM
Bridge Data bit 4
Data bit 5 for external SRAM
Bridge Data bit 5
Data bit 6 for external SRAM
Bridge Data bit 6
Data bit 7 for external SRAM
Bridge Data bit 7
Bridge Write enable / RD/WR
Output enable for external SRAM
Bridge Read enable / /DS
Description
Address bit 18 for external SRAM
Ground
+3.3 V power supply
Write enable for external SRAM
Chip Select for external SRAM
Ground
+3.3 V power supply
Oscillator Input Signal
Oscillator Output Signal
Clock Mode
Ground
+3.3 V power supply
Data Sheet
Clock
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LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
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March 2003 (rev. A)
Ò
Î
Cologne
Chip
Á
ÓÙØ
4
2
2
2
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
4
4
4
4
Ñ