HFC-S2M Cologne Chip AG, HFC-S2M Datasheet - Page 258

• Manufacturer Part Number: HFC-S2M
• Description: Isdn HDLC Fifo Controller With Primary Rate Interface
• Manufacturer: Cologne Chip AG

HFC-E1
258 of 272
R_GPIO_SEL
GPIO selection register
This register allows to select first or second function of some pins.
0
1
2
3
4
5
6
7
Bits
0
0
0
0
0
0
0
0
Reset
Value
Name
V_GPIO_SEL0
V_GPIO_SEL1
V_GPIO_SEL2
V_GPIO_SEL3
V_GPIO_SEL4
V_GPIO_SEL5
V_GPIO_SEL6
V_GPIO_SEL7
General purpose I/O pins
(write only)
Data Sheet
Description
GPIO0 and GPIO1
’0’ = pins T_A and T_B enabled
’1’ = pins GPIO0 and GPIO1 enabled
GPIO2 and GPIO3
’0’ = pins GPIO2 and GPIO3 disabled
’1’ = pins GPIO2 and GPIO3 enabled
GPIO4 and GPIO5
’0’ = pins GPIO4 and GPIO5 disabled
’1’ = pins GPIO4 and GPIO5 enabled
GPIO6 and GPIO7
’0’ = pins GPIO6 and GPIO7 disabled
’1’ = pins GPIO6 and GPIO7 enabled
GPIO8 and GPIO9
’0’ = pins GPIO8 and GPIO9 disabled
’1’ = pins GPIO8 and GPIO9 enabled
GPIO10 and GPIO11
’0’ = pins GPIO10 and GPIO11 disabled
’1’ = pins GPIO10 and GPIO11 enabled
GPIO12 and GPIO13
’0’ = pins GPIO12 and GPIO13 disabled
’1’ = pins GPIO12 and GPIO13 enabled
GPIO14 and GPIO15
’0’ = pins GPIO14 and GPIO15 disabled
’1’ = pins GPIO14 and GPIO15 enabled
March 2003 (rev. A)
Cologne
Chip
0x44