HFC-S2M Cologne Chip AG, HFC-S2M Datasheet - Page 252

• Manufacturer Part Number: HFC-S2M
• Description: Isdn HDLC Fifo Controller With Primary Rate Interface
• Manufacturer: Cologne Chip AG

Cologne
HFC-E1
General purpose I/O pins
Chip
13.1 GPIO and GPI functionality
Most of the interface signals can be used as general purpose I/O pins (GPIOs) or those who
are only inputs as general purpose input pins (GPIs). This functionality can be used if the
pins are not used as dedicated E1 interface.
GPIOs must be switched to GPIO mode in the register R_GPIO_SEL if they should be used
as outputs. The input functionality of all GPIOs and GPIs is allways enabled. The output
values for the GPIOs are set in the registers R_GPIO_OUT0 and R_GPIO_OUT1. The
tristate function can be enabled in the registers R_GPIO_EN0 and R_GPIO_EN1.
The input values for the GPIO[0..15] can be read in the registers R_GPIO_IN0 and R_GPIO_IN1.
The input values for GPI[0..31] can be read in the registers R_GPI_IN0, R_GPI_IN1,
R_GPI_IN2 and R_GPI_IN3.
13.2 GPIO output voltage adjustment
The GPIO output high voltage can be influenced for each set of 4 GPIOs by connecting
the appropiate VDD_E1 pin to a voltage different from VDD. The voltage must not exceed
3.6 V. See Table 13.2 for details.
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Data Sheet
March 2003 (rev. A)