HFC-S2M Cologne Chip AG, HFC-S2M Datasheet - Page 172

• Manufacturer Part Number: HFC-S2M
• Description: Isdn HDLC Fifo Controller With Primary Rate Interface
• Manufacturer: Cologne Chip AG

HFC-E1
172 of 272
R_RX_STA3
E1 receive status, register 3
4..0
7..5
R_SLIP
Frequency slip warning register
0
2..1
3
4
6..5
7
Bits
Bits
0
0
0
0
0
0
0
Reset
Value
Reset
Value
Name
V_SA84
(reserved)
Name
V_SLIP_RX
(reserved)
V_FOSLIP_RX
V_SLIP_TX
(reserved)
V_FOSLIP_TX
E1 interface
(read only)
(read only)
Data Sheet
Description
Ë
Description
Frequency slip in receive transmission
This bit is set when an overflow of the elastic
receive buffer has occured as a result of a frequency
slip. This bit is automatically cleared with new
buffer write access.
Force slip warning
This bit is set when bit V_SLIP_RX had been set
at least one time after the last read access to this
register. This bit is automatically cleared with an
read access to this register.
Frequency slip in transmit transmission
This bit is set when an overflow of the elastic
transmit buffer has occured as a result of a
frequency slip. This bit is automatically cleared
with new buffer read access.
Force slip warning
This bit is set when bit V_SLIP_TX had been set
at least one time after the last read access to this
register. This bit is automatically cleared with an
read access to this register.
bits
March 2003 (rev. A)
Cologne
Chip
0x2C
0x27