HFC-S2M Cologne Chip AG, HFC-S2M Datasheet - Page 14

• Manufacturer Part Number: HFC-S2M
• Description: Isdn HDLC Fifo Controller With Primary Rate Interface
• Manufacturer: Cologne Chip AG

HFC-E1
List of Registers (sorted by name)
Write only registers:
14 of 272
Address
0xFC
0xFD
0xD1
0xD0
0xFB
0x4C
0x4D
0xFA
0x0E
0xFF
0x1B
0x4E
0x4A
0x4B
0xF4
0x4F
0x45
0x47
0x02
0x48
0x49
0x00
0x18
0x01
G
Register addresses are assigned independently for write and read access, i.e. in
many cases there are different registers for write and read access with the same
address. Only registers with the same meaning and bitmap structure in write and
read direction are declared to be read & write.
It must be distinguished between registers, array registers and multi-registers.
Array registers have multiple instances and are indexed by a number. This in-
Multi-registers have multiple instances, too, but they are selected by a bitmap
The first letter of array register names is ‘A_ . . . ’ whereas all other registers begin
with ‘R_ . . . ’. The index of array registers and multi-registers has to be specified
in the appropriate register.
Name
A_CH_MSK
A_CHANNEL
A_CON_HDLC
A_CONF
A_FIFO_SEQ
R_INC_RES_FIFO
A_IRQ_MSK
A_SL_CFG
A_SUBCH_CFG
R_BERT_WD_MD
R_BRG_CTRL
R_BRG_MD
R_BRG_PCM_CFG
R_BRG_TIM_SEL01
R_BRG_TIM_SEL23
R_BRG_TIM_SEL45
R_BRG_TIM_SEL67
R_BRG_TIM0
R_BRG_TIM1
R_BRG_TIM2
R_BRG_TIM3
R_CIRM
R_CONF_EN
R_CTRL
Please note !
dex is either the FIFO number (R_FIFO with 13 indexed registers) or the
PCM time slot number (R_SLOT with 2 indexed registers). Array registers
have equal name, bitmap structure and meaning for every instance.
value. With this value, different registers can be selected with the same
address.
R_PCM_MD0) and 0x0F (2 instances selected by R_FIFO_MD) for
HFC-E1.
meaning for each instance.
Multi-register addresses are 0x15 (14 instances selected by
Multi-registers have different names, bitmap structure and
group
Reset
0, 1
0, 1
0, 1
0, 1
0, 1
0, 3
0, 1
0, 1
0, 2
H
H
H
–
–
0
0
0
0
0
0
0
0
0
0
Page
124
127
125
205
127
138
239
123
126
215
227
228
226
231
231
232
232
229
229
230
230
204
Data Sheet
86
87
Address
0x1C
0x1D
0x0D
0x0C
0x0B
0x0A
0x0F
0x0F
0x20
0x42
0x43
0x40
0x41
0x44
0x13
0x11
0x22
0x23
0x14
0x15
0x15
0x46
0x38
0x39
0x08
0x09
Name
R_DTMF0
R_DTMF1
R_E1_WR_STA
R_FIFO_MD
R_FIFO
R_FIRST_FIFO
R_FSM_IDX
R_GPIO_EN0
R_GPIO_EN1
R_GPIO_OUT0
R_GPIO_OUT1
R_GPIO_SEL
R_IRQ_CTRL
R_IRQMSK_MISC
R_LOS0
R_LOS1
R_PCM_MD0
R_PCM_MD1
R_PCM_MD2
R_PWM_MD
R_PWM0
R_PWM1
R_RAM_ADDR0
R_RAM_ADDR1
R_RAM_ADDR2
R_RAM_MISC
March 2003 (rev. A)
group
0, 1, 3
0, 1, 3
0, 1, 3
0, 1, 3
0, 1, 3
Reset
0, 1
0, 1
0, 1
0, 2
0, 2
0, 2
H
H
H
0
0
0
0
0
0
0
0
0
0
0
0
Cologne
Chip
Page
211
212
155
120
121
119
121
256
257
254
255
258
237
236
155
156
183
189
190
198
197
197
87
88
88
89