IP-AGX-PCIE/4 Altera, IP-AGX-PCIE/4 Datasheet - Page 96
IP-AGX-PCIE/4
Manufacturer Part Number
IP-AGX-PCIE/4
Description
IP CORE - PCI Express X1 And X4 Lanes For Arria GX
Manufacturer
Altera
Datasheet
1.IP-AGX-PCIE1.pdf
(362 pages)
Specifications of IP-AGX-PCIE/4
Software Application
IP CORE, Interface And Protocols, PCI
Supported Families
Arria GX, Cyclone II, HardCopy II, Stratix II
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Rohs Compliant
NA
Lead Free Status / RoHS Status
na
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5–12
Figure 5–11. 128-Bit Avalon-ST rx_st_data<n> Cycle Definition for 3-DWord Header TLPs with non-QWord Aligned
Addresses
Figure 5–12. 128-Bit Avalon-ST rx_st_data Cycle Definition for 4-DWord Header TLPs with non-QWord Aligned Addresses
Figure 5–13. 128-Bit Avalon-ST rx_st_data Cycle Definition for 4-DWord Header TLPs with QWord Aligned Addresses
PCI Express Compiler User Guide
rx_st_data[127:96]
rx_st_data[127:96]
rx_st_data[127:96]
rx_st_data[95:64]
rx_st_data[63:32]
rx_st_data[95:64]
rx_st_data[63:32]
rx_st_data[95:64]
rx_st_data[63:32]
rx_st_data[31:0]
rx_st_data[31:0]
rx_st_data[31:0]
Figure 5–11
for TLPs with a 3 dword header and non-qword aligned addresses.
Figure 5–12
for a four dword header with non-qword aligned addresses. In this example,
rx_st_empty is low because the data ends in the upper 64 bits of rx_st_data.
Figure 5–13
for a four dword header with qword aligned addresses.
rx_st_empty
rx_st_empty
rx_st_empty
rx_st_valid
rx_st_valid
rx_st_valid
rx_st_eop
rx_st_eop
rx_st_eop
rx_st_sop
rx_st_sop
rx_st_sop
clk
clk
clk
shows the mapping of 128-bit Avalon-ST RX packets to PCI Express TLPs
shows the mapping of 128-bit Avalon-ST RX packets to PCI Express TLPs
shows the mapping of 128-bit Avalon-ST RX packets to PCI Express TLPs
Header 2
Header 1
Header 0
Header 2
Header 1
Header 0
Header 3
Header 2
Header 1
Header 0
Header3
Data0
Data 4
Data 3
Data 2
Data 1
Data 2
Data 1
Data 0
Data 2
Data 1
Data 0
Data3
Data (n-1)
Data n-1
Data n-2
Data n-2
Data n-3
Data (n)
Data n-1
Data n
Data n
December 2010 Altera Corporation
Chapter 5: IP Core Interfaces
Avalon-ST Interface
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