IP-AGX-PCIE/4 Altera, IP-AGX-PCIE/4 Datasheet - Page 302
IP-AGX-PCIE/4
Manufacturer Part Number
IP-AGX-PCIE/4
Description
IP CORE - PCI Express X1 And X4 Lanes For Arria GX
Manufacturer
Altera
Datasheet
1.IP-AGX-PCIE1.pdf
(362 pages)
Specifications of IP-AGX-PCIE/4
Software Application
IP CORE, Interface And Protocols, PCI
Supported Families
Arria GX, Cyclone II, HardCopy II, Stratix II
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Rohs Compliant
NA
Lead Free Status / RoHS Status
na
- Current page: 302 of 362
- Download datasheet (7Mb)
A–2
Table A–3. Memory Read Request, Locked 32-Bit Addressing
Table A–4. Memory Read Request, 64-Bit Addressing
Table A–5. Memory Read Request, Locked 64-Bit Addressing
Table A–6. Configuration Read Request Root Port (Type 1)
Table A–7. I/O Read Request
Table A–8. Message without Data
PCI Express Compiler User Guide
Byte 8
Byte 12
Byte 0
Byte 4
Byte 8
Byte 12
Byte 0
Byte 4
Byte 8
Byte 12
Byte 0
Byte 4
Byte 8
Byte 12
Byte 0
Byte 4
Byte 8
Byte 12
+0
7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6
0 0 1 0 0 0 0 1 0
+0
7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7
+0
7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7
0 0 1 0 0 0 0 0 0
+0
7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7
0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 TD
+0
7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7
0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 TD
Bus Number
\
Requester ID
Requester ID
Requester ID
Requester ID
+1
+1
+1
+1
+1
Device No
TC
TC
0 0 0 0 TD
0 0 0 0 T
Address[31:2]
Func
Address[31:2]
Address[63:32]
Address[63:32]
Address[31:2]
Address[31:2]
Reserved
Reserved
Reserved
+2
+2
+2
+2
+2
0
EP
6
6
6
EP
EP 0 0 0 0 0 0 0 0 0 0 0 0 0 1
EP 0 0 0 0 0 0 0 0 0 0 0 0 0 1
0
6
5 4 3 2 1 0 7 6 5 4 3 2 1 0
5 4 3 2 1 0 7 6 5 4 3 2 1 0
5 4 3 2 1 0 7 6 5 4 3 2 1 0
5 4 3 2 1 0 7 6 5 4 3 2 1 0
0 0
Att
Att
5 4 3 2 1 0 7 6 5 4 3 2 1 0
r
r
Tag
Tag
Tag
Tag
0 0
0 0
Ext Reg
TLP Packet Format without Data Payload
December 2010 Altera Corporation
+3
+3
0 0 0 0 First BE
+3
0 0 0 0 First BE
+3
+3
Last BE
Last BE
Register No
Length
Length
First BE
First BE
Chapter :
0 0
0 0
0 0
0 0
0 0
Related parts for IP-AGX-PCIE/4
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
IP CORE - X1 Lane PCI Express For Arria GX
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
CYCLONE II STARTER KIT EP2C20N
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 35 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 15 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 30 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 7ns
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Classic EPLD
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet: