IP-AGX-PCIE/4 Altera, IP-AGX-PCIE/4 Datasheet - Page 160

IP CORE - PCI Express X1 And X4 Lanes For Arria GX

IP-AGX-PCIE/4

Manufacturer Part Number
IP-AGX-PCIE/4
Description
IP CORE - PCI Express X1 And X4 Lanes For Arria GX
Manufacturer
Altera
Datasheet

Specifications of IP-AGX-PCIE/4

Software Application
IP CORE, Interface And Protocols, PCI
Supported Families
Arria GX, Cyclone II, HardCopy II, Stratix II
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Rohs Compliant
NA
Lead Free Status / RoHS Status
na
6–16
Table 6–23. Correspondence Configuration Space Registers and PCI Express Base Specification Rev. 2.0 Description
PCI Express Compiler User Guide
Byte Address
0x800
0x804
0x808
0x80C
0x810
0x814
0x818
0x81C
0x82C
0x830
0x834
Config Reg Offset 31:24 23:16 15:8 7:0
PCI Express Enhanced Capability Header
Uncorrectable Error Status Register
Uncorrectable Error Mask Register
Uncorrectable Error Severity Register
Correctable Error Status Register
Correctable Error Mask Register
Advanced Error Capabilities and Control Register
Header Log Register
Root Error Command
Root Error Status
Error Source Identification Register Correctable
Error Source ID Register
Comprehensive Correspondence between Config Space Registers and PCIe Spec Rev 2.0
Corresponding Section in PCIe Specification
Advanced Error Reporting Enhanced Capability
Header
Uncorrectable Error Status Register
Uncorrectable Error Mask Register
Uncorrectable Error Severity Register
Correctable Error Status Register
Correctable Error Mask Register
Advanced Error Capabilities and Control Register
Header Log Register
Root Error Command Register
Root Error Status Register
Error Source Identification Register
December 2010 Altera Corporation
Chapter 6: Register Descriptions

Related parts for IP-AGX-PCIE/4